g32r4xx_ddl_comp.h

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/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef _G32R4XX_DDL_COMP_H__
#define _G32R4XX_DDL_COMP_H__
 
#ifdef __cplusplus
 extern "C" {
#endif
 
/* Includes ------------------------------------------------------------------*/
#include "g32r4xx.h"

 
#if defined (COMP1) || defined (COMP2) || defined (COMP3) || defined (COMP4)

 
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
#if defined(USE_FULL_DDL_DRIVER)

typedef struct
{
    uint32_t InputPlus;             
 
    uint32_t InputMinus;            
 
    uint32_t OutputPol;             
 
    uint32_t OutputBlank;           
} DDL_COMP_InitTypeDef;

#endif /* USE_FULL_DDL_DRIVER */
 
/* Exported constants --------------------------------------------------------*/

#define DDL_COMP_INPUT_PLUS_INP0  (0x00000000UL)        
#define DDL_COMP_INPUT_PLUS_INP1  (COMP_CSTS_VP_SEL_0)  
#define DDL_COMP_INPUT_PLUS_DAC2  (COMP_CSTS_VP_SEL_1)  
#define DDL_COMP_INPUT_PLUS_DAC1  (COMP_CSTS_VP_SEL_1)  


#define DDL_COMP_INPUT_MINUS_INN0  (0x00000000UL)        
#define DDL_COMP_INPUT_MINUS_INN1  (COMP_CSTS_VN_SEL_0)  
#define DDL_COMP_INPUT_MINUS_DAC2  (COMP_CSTS_VN_SEL_1)  
#define DDL_COMP_INPUT_MINUS_DAC1  (COMP_CSTS_VN_SEL_1)  


#define DDL_COMP_OUTPUTPOL_NONINVERTED  (0x00000000UL)   
#define DDL_COMP_OUTPUTPOL_INVERTED     (COMP_CSTS_POL)  

#define DDL_COMP_HYS_DISABLE  (0x00000000UL)
 
#define DDL_COMP_HYS_LEVEL0  (COMP_CSTS_HYS_0)
#define DDL_COMP_HYS_LEVEL1  (COMP_CSTS_HYS_1)
#define DDL_COMP_HYS_LEVEL2  (COMP_CSTS_HYS_1 | COMP_CSTS_HYS_0)

#define DDL_COMP_BLANK_0  (0x00000000UL)                                 
#define DDL_COMP_BLANK_1  (COMP_CSTS_BLANKSEL_0)                         
#define DDL_COMP_BLANK_2  (COMP_CSTS_BLANKSEL_1)                         
#define DDL_COMP_BLANK_3  (COMP_CSTS_BLANKSEL_0 | COMP_CSTS_BLANKSEL_1)  
#define DDL_COMP_BLANK_4  (COMP_CSTS_BLANKSEL_2)                         
#define DDL_COMP_BLANK_6  (COMP_CSTS_BLANKSEL_2 | COMP_CSTS_BLANKSEL_1)  
#define DDL_COMP_BLANK_7  (COMP_CSTS_BLANKSEL)                           

#define DDL_COMP_OUTPUT_SEL_NONE       (0x00000000UL)
#define DDL_COMP_OUTPUT_SEL_TMR1_BKIN  (COMP_CSTS_TMR_SEL_0)
#define DDL_COMP_OUTPUT_SEL_TMR1_IC1   (COMP_CSTS_TMR_SEL_1)
#define DDL_COMP_OUTPUT_SEL_TMR1_IC2   (COMP_CSTS_TMR_SEL_1 | COMP_CSTS_TMR_SEL_0)
#define DDL_COMP_OUTPUT_SEL_TMR1_ETR   (COMP_CSTS_TMR_SEL_2)
#define DDL_COMP_OUTPUT_SEL_TMR2_IC1   (COMP_CSTS_TMR_SEL_2 | COMP_CSTS_TMR_SEL_0)
#define DDL_COMP_OUTPUT_SEL_TMR2_IC2   (COMP_CSTS_TMR_SEL_2 | COMP_CSTS_TMR_SEL_1)
#define DDL_COMP_OUTPUT_SEL_TMR2_IC3   (COMP_CSTS_TMR_SEL_2 | COMP_CSTS_TMR_SEL_1 | COMP_CSTS_TMR_SEL_0)
#define DDL_COMP_OUTPUT_SEL_TMR2_IC4   (COMP_CSTS_TMR_SEL_3)
#define DDL_COMP_OUTPUT_SEL_TMR2_ETR   (COMP_CSTS_TMR_SEL_3 | COMP_CSTS_TMR_SEL_0)
#define DDL_COMP_OUTPUT_SEL_TMR3_IC1   (COMP_CSTS_TMR_SEL_3 | COMP_CSTS_TMR_SEL_1)
#define DDL_COMP_OUTPUT_SEL_TMR3_IC2   (COMP_CSTS_TMR_SEL_3 | COMP_CSTS_TMR_SEL_1 | COMP_CSTS_TMR_SEL_0)
#define DDL_COMP_OUTPUT_SEL_TMR3_ETR   (COMP_CSTS_TMR_SEL_3 | COMP_CSTS_TMR_SEL_2)
#define DDL_COMP_OUTPUT_SEL_TMR4_IC1   (COMP_CSTS_TMR_SEL_3 | COMP_CSTS_TMR_SEL_2 | COMP_CSTS_TMR_SEL_0)
#define DDL_COMP_OUTPUT_SEL_TMR4_IC2   (COMP_CSTS_TMR_SEL_3 | COMP_CSTS_TMR_SEL_2 | COMP_CSTS_TMR_SEL_1)
#define DDL_COMP_OUTPUT_SEL_TMR4_ETR   (COMP_CSTS_TMR_SEL)

#define DDL_COMP_OUTPUT_LEVEL_LOW   (0x00000000UL)      
#define DDL_COMP_OUTPUT_LEVEL_HIGH  (COMP_CSTS_OUTVAL)  

#define DDL_COMP_FILTER_NONE      (0x00000000UL)
#define DDL_COMP_FILTER_2HSICLK   (COMP_CSTS_FILTER_0)
#define DDL_COMP_FILTER_4HSICLK   (COMP_CSTS_FILTER_1)
#define DDL_COMP_FILTER_6HSICLK   (COMP_CSTS_FILTER_1 | COMP_CSTS_FILTER_0)
#define DDL_COMP_FILTER_12HSICLK  (COMP_CSTS_FILTER_2)
#define DDL_COMP_FILTER_18HSICLK  (COMP_CSTS_FILTER_2 | COMP_CSTS_FILTER_0)
#define DDL_COMP_FILTER_24HSICLK  (COMP_CSTS_FILTER_2 | COMP_CSTS_FILTER_1)
#define DDL_COMP_FILTER_30HSICLK  (COMP_CSTS_FILTER)

 
/* Delay for comparator startup time */
#define DDL_COMP_DELAY_STARTUP_US  (80UL)  

 
/* Exported macro ------------------------------------------------------------*/

#define DDL_COMP_WriteReg(__INSTANCE__,  __REG__, __VALUE__)     WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))

#define DDL_COMP_ReadReg(__INSTANCE__,  __REG__)                 READ_REG(__INSTANCE__->__REG__)

 
/* Exported functions --------------------------------------------------------*/


__STATIC_INLINE void DDL_COMP_SetHysteresis(COMP_TypeDef *COMPx, uint32_t Hysteresis)
{
    MODIFY_REG(COMPx->CxCSR, COMP_CSTS_HYS, Hysteresis);
}

__STATIC_INLINE uint32_t DDL_COMP_GetHysteresis(COMP_TypeDef *COMPx)
{
    return (uint32_t)READ_BIT(COMPx->CxCSR, COMP_CSTS_HYS);
}

__STATIC_INLINE void DDL_COMP_SetOutputBlank(COMP_TypeDef *COMPx,
                                            uint32_t Blank)
{
    MODIFY_REG(COMPx->CxCSR, COMP_CSTS_BLANKSEL, Blank);
}

__STATIC_INLINE uint32_t DDL_COMP_GetOutputBlank(COMP_TypeDef *COMPx)
{
    return (uint32_t)(READ_BIT(COMPx->CxCSR, COMP_CSTS_BLANKSEL));
}



__STATIC_INLINE void DDL_COMP_SetInputPlus(COMP_TypeDef *COMPx,
                                            uint32_t InputPlus)
{
    MODIFY_REG(COMPx->CxCSR, COMP_CSTS_VP_SEL, InputPlus);
}

__STATIC_INLINE uint32_t DDL_COMP_GetInputPlus(COMP_TypeDef *COMPx)
{
    return (uint32_t)(READ_BIT(COMPx->CxCSR, COMP_CSTS_VP_SEL));
}

__STATIC_INLINE void DDL_COMP_SetInputMinus(COMP_TypeDef *COMPx,
                                            uint32_t InputMinus)
{
    /* Note: Input minus is available only for COMP1 and COMP2. */
    MODIFY_REG(COMPx->CxCSR, COMP_CSTS_VN_SEL, InputMinus);
}

__STATIC_INLINE uint32_t DDL_COMP_GetInputMinus(COMP_TypeDef *COMPx)
{
    return (uint32_t)(READ_BIT(COMPx->CxCSR, COMP_CSTS_VN_SEL));
}



__STATIC_INLINE void DDL_COMP_SetOutputSelect(COMP_TypeDef *COMPx,
                                                uint32_t OutputSel)
{
    MODIFY_REG(COMPx->CxCSR, COMP_CSTS_TMR_SEL, OutputSel);
}

__STATIC_INLINE uint32_t DDL_COMP_GetOutputSelect(COMP_TypeDef *COMPx)
{
    return (uint32_t)(READ_BIT(COMPx->CxCSR, COMP_CSTS_TMR_SEL));
}

__STATIC_INLINE void DDL_COMP_SetOutputPolarity(COMP_TypeDef *COMPx,
                                                uint32_t OutputPol)
{
    MODIFY_REG(COMPx->CxCSR, COMP_CSTS_POL, OutputPol);
}

__STATIC_INLINE uint32_t DDL_COMP_GetOutputPolarity(COMP_TypeDef *COMPx)
{
    return (uint32_t)(READ_BIT(COMPx->CxCSR, COMP_CSTS_POL));
}



__STATIC_INLINE void DDL_COMP_Enable(COMP_TypeDef *COMPx)
{
    SET_BIT(COMPx->CxCSR, COMP_CSTS_EN);
}

__STATIC_INLINE void DDL_COMP_Disable(COMP_TypeDef *COMPx)
{
    CLEAR_BIT(COMPx->CxCSR, COMP_CSTS_EN);
}

__STATIC_INLINE uint32_t DDL_COMP_IsEnabled(COMP_TypeDef *COMPx)
{
    return ((READ_BIT(COMPx->CxCSR, COMP_CSTS_EN) == (COMP_CSTS_EN)) ? 1UL : 0UL);
}

__STATIC_INLINE void DDL_COMP_Lock(COMP_TypeDef *COMPx)
{
    SET_BIT(COMPx->CxCSR, COMP_CSTS_LOCK);
}

__STATIC_INLINE uint32_t DDL_COMP_IsLocked(COMP_TypeDef *COMPx)
{
    return ((READ_BIT(COMPx->CxCSR, COMP_CSTS_LOCK) == (COMP_CSTS_LOCK)) ? 1UL : 0UL);
}

__STATIC_INLINE uint32_t DDL_COMP_ReadOutputLevel(COMP_TypeDef *COMPx)
{
    return((READ_BIT(COMPx->CxCSR, COMP_CSTS_OUTVAL) == (COMP_CSTS_OUTVAL)) ? 1UL : 0UL);
}



__STATIC_INLINE void DDL_COMP_SetFilter(COMP_TypeDef *COMPx, uint32_t Filter)
{
    MODIFY_REG(COMPx->CxCSR, COMP_CSTS_FILTER, Filter);
}

__STATIC_INLINE uint32_t DDL_COMP_GetFilter(COMP_TypeDef *COMPx)
{
    return (uint32_t)(READ_BIT(COMPx->CxCSR, COMP_CSTS_FILTER));
}

 
#if defined(USE_FULL_DDL_DRIVER)
 
ErrorStatus DDL_COMP_Init(COMP_TypeDef *COMPx, DDL_COMP_InitTypeDef *COMP_InitStruct);
ErrorStatus DDL_COMP_DeInit(COMP_TypeDef *COMPx);
void        DDL_COMP_StructInit(DDL_COMP_InitTypeDef *COMP_InitStruct);

#endif /* USE_FULL_DDL_DRIVER */


 
#endif /* COMP1 || COMP2 || COMP3 || COMP4 */

 
#ifdef __cplusplus
}
#endif
 
#endif /* _G32R4XX_DDL_COMP_H__ */