43#ifndef G32R4xx_DDL_FLASH_H
44#define G32R4xx_DDL_FLASH_H
74#define FLASH_DDL_WAIT_PERIOD_0 (0x00000000UL)
75#define FLASH_DDL_WAIT_PERIOD_1 (FLASH_CR2_RDWAIT_0)
76#define FLASH_DDL_WAIT_PERIOD_2 (FLASH_CR2_RDWAIT_1)
77#define FLASH_DDL_WAIT_PERIOD_3 (FLASH_CR2_RDWAIT_1 | FLASH_CR2_RDWAIT_0)
78#define FLASH_DDL_WAIT_PERIOD_4 (FLASH_CR2_RDWAIT_2)
79#define FLASH_DDL_WAIT_PERIOD_5 (FLASH_CR2_RDWAIT_2 | FLASH_CR2_RDWAIT_0)
80#define FLASH_DDL_WAIT_PERIOD_6 (FLASH_CR2_RDWAIT_2 | FLASH_CR2_RDWAIT_1)
81#define FLASH_DDL_WAIT_PERIOD_7 (FLASH_CR2_RDWAIT_2 | FLASH_CR2_RDWAIT_1 | FLASH_CR2_RDWAIT_0)
82#define FLASH_DDL_WAIT_PERIOD_8 (FLASH_CR2_RDWAIT_3)
83#define FLASH_DDL_WAIT_PERIOD_9 (FLASH_CR2_RDWAIT_3 | FLASH_CR2_RDWAIT_0)
84#define FLASH_DDL_WAIT_PERIOD_10 (FLASH_CR2_RDWAIT_3 | FLASH_CR2_RDWAIT_1)
85#define FLASH_DDL_WAIT_PERIOD_11 (FLASH_CR2_RDWAIT_3 | FLASH_CR2_RDWAIT_1 | FLASH_CR2_RDWAIT_0)
86#define FLASH_DDL_WAIT_PERIOD_12 (FLASH_CR2_RDWAIT_3 | FLASH_CR2_RDWAIT_2)
87#define FLASH_DDL_WAIT_PERIOD_13 (FLASH_CR2_RDWAIT_3 | FLASH_CR2_RDWAIT_2 | FLASH_CR2_RDWAIT_0)
88#define FLASH_DDL_WAIT_PERIOD_14 (FLASH_CR2_RDWAIT_3 | FLASH_CR2_RDWAIT_2 | FLASH_CR2_RDWAIT_1)
89#define FLASH_DDL_WAIT_PERIOD_15 (FLASH_CR2_RDWAIT_3 | FLASH_CR2_RDWAIT_2 | FLASH_CR2_RDWAIT_1 | FLASH_CR2_RDWAIT_0)
98#define FLASH_DDL_MAIN_LOCK (FLASH_SR_MAINUNLOCK)
99#define FLASH_DDL_MAIN_KEY1 (0x96969696UL)
100#define FLASH_DDL_MAIN_KEY2 (0x3C3C3C3CUL)
102#define FLASH_DDL_OPT_LOCK (FLASH_SR_OPUNLOCK)
103#define FLASH_DDL_OPT_KEY1 (0xAAAABBBBUL)
104#define FLASH_DDL_OPT_KEY2 (0x44556677UL)
113#define FLASH_DDL_CHIP_ERASE_TYPE_SECTOR (0x00000000UL)
114#define FLASH_DDL_CHIP_ERASE_TYPE_BLOCK (FLASH_CR1_ERTYPE_0)
115#define FLASH_DDL_CHIP_ERASE_TYPE_MAIN (FLASH_CR1_ERTYPE_1 | FLASH_CR1_ERTYPE_0)
124#define DDL_FLASH_READ_PROTECTION_LEVEL_0 ((0xAAUL << FLASH_OBCR1_RDPWBF_Pos) & FLASH_OBCR1_RDPWBF_Msk)
125#define DDL_FLASH_READ_PROTECTION_LEVEL_1 ((0xBBUL << FLASH_OBCR1_RDPWBF_Pos) & FLASH_OBCR1_RDPWBF_Msk)
126#define DDL_FLASH_READ_PROTECTION_LEVEL_2 ((0xCCUL << FLASH_OBCR1_RDPWBF_Pos) & FLASH_OBCR1_RDPWBF_Msk)
128#define DDL_FLASH_WRITE_PROTECTION_ENABLE (FLASH_OBCR1_WLOCKENBF)
129#define DDL_FLASH_WRITE_PROTECTION_DISABLE (0x00000000UL)
131#define DDL_FLASH_IWDT_ENABLE_SOFTWARE (FLASH_OBCR1_IWDTSWBF)
132#define DDL_FLASH_IWDT_ENABLE_HARDWARE (0x00000000UL)
134#define DDL_FLASH_WWDT_ENABLE_SOFTWARE (FLASH_OBCR1_WWDTSWBF)
135#define DDL_FLASH_WWDT_ENABLE_HARDWARE (0x00000000UL)
137#define DDL_FLASH_NMI_ENABLE (FLASH_OBCR1_NMIDISWBF)
138#define DDL_FLASH_NMI_DISABLE (0x00000000UL)
140#define DDL_FLASH_ADC_TRIM_SOFTWARE (0x00000000)
141#define DDL_FLASH_ADC_TRIM_HARDWARE FLASH_OBCR1_ADTSLOADWBF
143#define DDL_FLASH_SECTOR_NONE (0x00000000)
144#define DDL_FLASH_SECTOR_0_31 (FLASH_OBCR1_WLOCKBF_0)
145#define DDL_FLASH_SECTOR_32_63 (FLASH_OBCR1_WLOCKBF_1)
146#define DDL_FLASH_SECTOR_64_95 (FLASH_OBCR1_WLOCKBF_2)
147#define DDL_FLASH_SECTOR_96_127 (FLASH_OBCR1_WLOCKBF_3)
148#define DDL_FLASH_SECTOR_128_159 (FLASH_OBCR1_WLOCKBF_4)
149#define DDL_FLASH_SECTOR_160_191 (FLASH_OBCR1_WLOCKBF_5)
150#define DDL_FLASH_SECTOR_192_223 (FLASH_OBCR1_WLOCKBF_6)
151#define DDL_FLASH_SECTOR_224_255 (FLASH_OBCR1_WLOCKBF_7)
161#define DDL_FLASH_CACHE_PRELOAD_ENABLE FLASH_CR2_PREFETCHEN
162#define DDL_FLASH_CACHE_PRELOAD_DISABLE (0x00000000UL)
171#define FLASH_SECTOR_SIZE (512UL)
172#define FLASH_MAIN_SIZE (256UL * FLASH_SECTOR_SIZE)
174#define FLASH_SYSTEMINFO_BASE (0x08020000UL)
175#define FLASH_MAIN_BASE (0x08000000UL)
186#if defined(USE_FULL_DDL_DRIVER)
245#define __DDL_FLASH_CALCULATE_BOOT_ADDRESS(__BOOT_ADDR__) \
246 (((__BOOT_ADDR__ & 0x8000UL) << 14UL) | ((__BOOT_ADDR__ & 0x7FFF) << 13UL))
248#define __DDL_FLASH_IS_VALID_BOOT_ADDRESS(__TRNS_BOOT_ADDR__) \
249 (((__TRNS_BOOT_ADDR__ >= 0x00100000UL) && (__TRNS_BOOT_ADDR__ <= 0x2000BFFFUL)) ? 1UL : 0UL)
251#define __DDL_FLASH_WRITE_TO_ADDRESS(__ADDR__, __DATA__) \
252 (*(uint32_t *)(__ADDR__) = (__DATA__))
290 MODIFY_REG(FLASH->CR2,
291 FLASH_CR2_RDWAIT, waitPeriod & FLASH_CR2_RDWAIT_Msk);
316 return (uint32_t)READ_BIT(FLASH->CR2, FLASH_CR2_RDWAIT);
371 MODIFY_REG(FLASH->CR1, FLASH_CR1_EREQ, FLASH_CR1_EREQ);
380 return (READ_BIT(FLASH->CR1, FLASH_CR1_EREQ) == FLASH_CR1_EREQ) ? 1UL : 0UL;
393 MODIFY_REG(FLASH->CR1, FLASH_CR1_ERTYPE, type);
405 return (uint32_t)READ_BIT(FLASH->CR1, FLASH_CR1_ERTYPE);
416 MODIFY_REG(FLASH->TMCR, FLASH_TMCR_UNIT, timeBase & FLASH_TMCR_UNIT_Msk);
426 return (uint32_t)READ_BIT(FLASH->TMCR, FLASH_TMCR_UNIT);
443 MODIFY_REG(FLASH->CR1, FLASH_CR1_PREQ, FLASH_CR1_PREQ);
452 return (READ_BIT(FLASH->CR1, FLASH_CR1_PREQ) == FLASH_CR1_PREQ) ? 1UL : 0UL;
473 MODIFY_REG(FLASH->OBCR1, FLASH_OBCR1_RDPWBF, level);
485 return (uint32_t)READ_BIT(FLASH->OBCR1, FLASH_OBCR1_RDPWBF);
497 return (uint32_t)READ_BIT(FLASH->OBSR1, FLASH_OBSR1_RDP);
509 MODIFY_REG(FLASH->OBCR1, FLASH_OBCR1_WLOCKENBF, isEnabled);
520 return (uint32_t)READ_BIT(FLASH->OBCR1, FLASH_OBCR1_WLOCKENBF);
531 return (uint32_t)READ_BIT(FLASH->OBSR1, FLASH_OBSR1_WLOCKEN);
550 MODIFY_REG(FLASH->OBCR1, FLASH_OBCR1_WLOCKBF, ~sectorBlock);
568 return (uint32_t)READ_BIT(FLASH->OBCR1, FLASH_OBCR1_WLOCKBF);
586 return (uint32_t)READ_BIT(FLASH->OBSR1, FLASH_OBSR1_WLOCK);
598 MODIFY_REG(FLASH->OBCR1, FLASH_OBCR1_NMIDISWBF, nmiEnable);
609 return (uint32_t)READ_BIT(FLASH->OBCR1, FLASH_OBCR1_NMIDISWBF);
620 return (uint32_t)READ_BIT(FLASH->OBSR1, FLASH_OBSR1_NMIDIS);
632 MODIFY_REG(FLASH->OBCR1, FLASH_OBCR1_ADTSLOADWBF, adcTrim);
643 return (uint32_t)READ_BIT(FLASH->OBCR1, FLASH_OBCR1_ADTSLOADWBF);
654 return (uint32_t)READ_BIT(FLASH->OBSR1, FLASH_OBSR1_ADTSLOAD);
666 MODIFY_REG(FLASH->OBCR1, FLASH_OBCR1_IWDTSWBF, isEnabled);
677 return (uint32_t)READ_BIT(FLASH->OBCR1, FLASH_OBCR1_IWDTSWBF);
688 return (uint32_t)READ_BIT(FLASH->OBSR1, FLASH_OBSR1_IWDTSW);
700 MODIFY_REG(FLASH->OBCR1, FLASH_OBCR1_WWDTSWBF, isEnabled);
711 return (uint32_t)READ_BIT(FLASH->OBCR1, FLASH_OBCR1_WWDTSWBF);
722 return (uint32_t)READ_BIT(FLASH->OBSR1, FLASH_OBSR1_WWDTSW);
733 MODIFY_REG(FLASH->OBCR2, FLASH_OBCR2_BOOTADDRBF, bootAddr);
743 return (uint32_t)READ_BIT(FLASH->OBCR2, FLASH_OBCR2_BOOTADDRBF);
753 return (uint32_t)READ_BIT(FLASH->OBSR2, FLASH_OBSR2_BOOTADDR);
764 uint32_t bootAddr = (uint32_t)READ_BIT(FLASH->OBSR2, FLASH_OBSR2_BOOTADDR);
775 MODIFY_REG(FLASH->OBCR1, FLASH_OBCR1_OPBWREQ, FLASH_OBCR1_OPBWREQ);
784 return (READ_BIT(FLASH->OBCR1, FLASH_OBCR1_OPBWREQ) == FLASH_OBCR1_OPBWREQ) ? 1UL : 0UL;
793 MODIFY_REG(FLASH->CR1, FLASH_CR1_OPRELOAD, 0xA5A50000 | FLASH_CR1_OPRELOAD);
810 MODIFY_REG(FLASH->CR2, FLASH_CR2_CACHERST, FLASH_CR2_CACHERST);
819 return (READ_BIT(FLASH->CR2, FLASH_CR2_CACHERST) == FLASH_CR2_CACHERST) ? 1UL : 0UL;
863 SET_BIT(FLASH->CR1, FLASH_CR1_ERRIE);
872 CLEAR_BIT(FLASH->CR1, FLASH_CR1_ERRIE);
882 return ((READ_BIT(FLASH->CR1, FLASH_CR1_ERRIE) == (FLASH_CR1_ERRIE)) ? 1UL : 0UL);
891 return ((READ_BIT(FLASH->SR, FLASH_SR_WADRERR) == (FLASH_SR_WADRERR)) ? 1UL : 0UL);
900 FLASH->SR = FLASH_SR_WADRERR;
909 return ((READ_BIT(FLASH->SR, FLASH_SR_WRPRTERR) == (FLASH_SR_WRPRTERR)) ? 1UL : 0UL);
918 FLASH->SR = FLASH_SR_WRPRTERR;
927 return ((READ_BIT(FLASH->SR, FLASH_SR_KEYERR) == (FLASH_SR_KEYERR)) ? 1UL : 0UL);
936 FLASH->SR = FLASH_SR_KEYERR;
945 SET_BIT(FLASH->CR1, FLASH_CR1_EOPIE);
954 CLEAR_BIT(FLASH->CR1, FLASH_CR1_EOPIE);
964 return ((READ_BIT(FLASH->CR1, FLASH_CR1_EOPIE) == (FLASH_CR1_EOPIE)) ? 1UL : 0UL);
973 return ((READ_BIT(FLASH->SR, FLASH_SR_PRD) == (FLASH_SR_PRD)) ? 1UL : 0UL);
982 FLASH->SR = FLASH_SR_PRD;
991 return ((READ_BIT(FLASH->SR, FLASH_SR_ERD) == (FLASH_SR_ERD)) ? 1UL : 0UL);
1000 FLASH->SR = FLASH_SR_ERD;
1009 return ((READ_BIT(FLASH->SR, FLASH_SR_OPUNLOCK) == (FLASH_SR_OPUNLOCK)) ? 1UL : 0UL);
1018 return ((READ_BIT(FLASH->SR, FLASH_SR_MAINUNLOCK) == (FLASH_SR_MAINUNLOCK)) ? 1UL : 0UL);
1027 return ((READ_BIT(FLASH->SR, FLASH_SR_OPTERR) == (FLASH_SR_OPTERR)) ? 1UL : 0UL);
1036 return ((READ_BIT(FLASH->SR, FLASH_SR_TRIMERR) == (FLASH_SR_TRIMERR)) ? 1UL : 0UL);
1045 return ((READ_BIT(FLASH->SR, FLASH_SR_OPBPRD) == (FLASH_SR_OPBPRD)) ? 1UL : 0UL);
1054 FLASH->SR = FLASH_SR_OPBPRD;
1063 return ((READ_BIT(FLASH->SR, FLASH_SR_BUSY) == (FLASH_SR_BUSY)) ? 1UL : 0UL);
1078 FLASH->SR = (FLASH_SR_ERD | FLASH_SR_PRD | FLASH_SR_KEYERR
1079 | FLASH_SR_WRPRTERR | FLASH_SR_WADRERR | FLASH_SR_OPBPRD);
1086#if defined(USE_FULL_DDL_DRIVER)
#define DDL_FLASH_CACHE_PRELOAD_ENABLE
#define DDL_FLASH_CACHE_PRELOAD_DISABLE
__STATIC_INLINE uint32_t DDL_FLASH_CachePreloadModeIsEnabled(void)
Get cache preload mode status.
__STATIC_INLINE void DDL_FLASH_DisableCachePreloadMode(void)
Disable cache preload mode.
__STATIC_INLINE void DDL_FLASH_EnableCachePreloadMode(void)
Enable cache preload mode.
__STATIC_INLINE uint32_t DDL_FLASH_CacheResetOngoing(void)
Cache reset.
__STATIC_INLINE void DDL_FLASH_CacheReset(void)
Cache reset.
__STATIC_INLINE uint32_t DDL_FLASH_GetEraseTimeBase(void)
Get chip erasing time base.
__STATIC_INLINE void DDL_FLASH_SetErasureType(uint32_t type)
Types of chip erasure configuration.
__STATIC_INLINE void DDL_FLASH_EnableErasure(void)
Start erasure.
__STATIC_INLINE uint32_t DDL_FLASH_ErasureOngoing(void)
Get erasure status.
__STATIC_INLINE uint32_t DDL_FLASH_GetErasureType(void)
Get the type of configuration chip erasure.
__STATIC_INLINE void DDL_FLASH_SetEraseTimeBase(uint32_t timeBase)
Configuring chip erasing time base.
__STATIC_INLINE void DDL_FLASH_MAIN_Lock(void)
Lock the flash main storage area.
__STATIC_INLINE uint32_t DDL_FLASH_GetWaitPeriod(void)
Get flash wait period.
__STATIC_INLINE void DDL_FLASH_SetWaitPeriod(uint32_t waitPeriod)
Set flash wait period.
__STATIC_INLINE void DDL_FLASH_OPT_UnLock(void)
Unlock the flash sysinfo storage area.
__STATIC_INLINE void DDL_FLASH_MAIN_UnLock(void)
Unlock the flash main storage area.
__STATIC_INLINE void DDL_FLASH_OPT_Lock(void)
Lock the flash opt storage area.
__STATIC_INLINE uint32_t DDL_FLASH_GetBootAddrCacheBit(void)
Get the write cache bit for setting BOOTADDR.
__STATIC_INLINE uint32_t DDL_FLASH_GetBootAddrTransferActualAddress(void)
Retrieve the data in the BOOTADDR option byte, which corresponds to the converted address.
__STATIC_INLINE uint32_t DDL_FLASH_GetWriteProtectionCacheBit(void)
Get write protection cache bit.
__STATIC_INLINE uint32_t DDL_FLASH_GetIWDTTriggerBySoftwareInOptionByte(void)
Get the IWDT software enables in the option byte.
__STATIC_INLINE void DDL_FLASH_OptionByteForcedUpdate(void)
Forced update of the options byte.
__STATIC_INLINE uint32_t DDL_FLASH_OptionByteUpdateOngoing(void)
Byte programming options Status.
__STATIC_INLINE uint32_t DDL_FLASH_GetNMIEnableCacheBit(void)
Get NMI Pin Enable Configuration.
__STATIC_INLINE uint32_t DDL_FLASH_GetADCTRIMCacheBitInOptionByte(void)
Get ADC TRIM Configuration.
__STATIC_INLINE uint32_t DDL_FLASH_GetReadProtectionBitInOptionByte(void)
Get the read protection bit in the option byte.
__STATIC_INLINE uint32_t DDL_FLASH_GetWriteProtectionEnableCacheBit(void)
Get write protection enable cache bit.
__STATIC_INLINE void DDL_FLASH_OptionByteUpdate(void)
Byte programming options.
__STATIC_INLINE uint32_t DDL_FLASH_GetADCTRIMCacheBit(void)
Get ADC TRIM Configuration.
__STATIC_INLINE uint32_t DDL_FLASH_GetWriteProtectionBitInOptionByte(void)
Get the write protection bit in the option byte.
__STATIC_INLINE uint32_t DDL_FLASH_GetWriteProtectionEnableBitInOptionByte(void)
Get the write protection enable bit in the option byte.
__STATIC_INLINE uint32_t DDL_FLASH_GetBootAddrInOptionByte(void)
Get the write cache bit for setting BOOTADDR in Option Byte.
__STATIC_INLINE void DDL_FLASH_SetWriteProtectionCacheBit(uint32_t sectorBlock)
Set write protection cache bit.
__STATIC_INLINE void DDL_FLASH_SetReadProtectionCacheBit(uint32_t level)
Set read protection cache bit.
__STATIC_INLINE uint32_t DDL_FLASH_GetWWDTTriggerBySoftwareInOptionByte(void)
Get the WWDT software enables in the option byte.
__STATIC_INLINE void DDL_FLASH_SetNMIEnableCacheBit(uint32_t nmiEnable)
Set NMI Pin Enable Configuration.
__STATIC_INLINE void DDL_FLASH_SetADCTRIMCacheBit(uint32_t adcTrim)
Set ADC TRIM Configuration.
__STATIC_INLINE void DDL_FLASH_SetIWDTTriggerBySoftwareCacheBit(uint32_t isEnabled)
Set IWDT software enables cache bits.
__STATIC_INLINE uint32_t DDL_FLASH_GetReadProtectionCacheBit(void)
Get read protection cache bit.
__STATIC_INLINE void DDL_FLASH_SetBootAddrCacheBit(uint32_t bootAddr)
Set the write cache bit for setting BOOTADDR.
__STATIC_INLINE uint32_t DDL_FLASH_GetWWDTTriggerBySoftwareCacheBit(void)
Get WWDT software enables cache bits.
__STATIC_INLINE void DDL_FLASH_SetWriteProtectionEnableCacheBit(uint32_t isEnabled)
Set write protection enable cache bit.
__STATIC_INLINE uint32_t DDL_FLASH_GetIWDTTriggerBySoftwareCacheBit(void)
Get IWDT software enables cache bits.
__STATIC_INLINE void DDL_FLASH_SetWWDTTriggerBySoftwareCacheBit(uint32_t isEnabled)
Set WWDT software enables cache bits.
__STATIC_INLINE uint32_t DDL_FLASH_GetNMIEnableCacheBitInOptionByte(void)
Get NMI Pin Enable Configuration.
__STATIC_INLINE void DDL_FLASH_EnableProgram(void)
Start program.
__STATIC_INLINE uint32_t DDL_FLASH_ProgramOngoing(void)
Get program status.
__STATIC_INLINE void DDL_FLASH_DisableIT_ERR(void)
Disable interruption Flash error.
__STATIC_INLINE uint32_t DDL_FLASH_IsActiveFlag_PRD(void)
Programming completed flag.
__STATIC_INLINE uint32_t DDL_FLASH_IsActiveFlag_OPBPRD(void)
The optionbyte programming completion flag.
__STATIC_INLINE void DDL_FLASH_ClearFlag_KEYERR(void)
Clear Flash KEY error flag.
__STATIC_INLINE void DDL_FLASH_EnableIT_ERR(void)
Enable interruption Flash error.
__STATIC_INLINE uint32_t DDL_FLASH_IsActiveFlag_OPTERR(void)
The option_byte does not meet the parity check flag.
__STATIC_INLINE uint32_t DDL_FLASH_IsEnabledIT_EOP(void)
Get state of interruption programming or erase end. (0: interrupt disabled, 1: interrupt enabled).
__STATIC_INLINE void DDL_FLASH_ClearFlag_WRPRTERR(void)
Clear write protection error flag.
__STATIC_INLINE void DDL_FLASH_ClearFlag_PRD(void)
Clear programming completed flag.
__STATIC_INLINE uint32_t DDL_FLASH_IsActiveFlag_MAINUNLOCK(void)
Locking flag for main area.
__STATIC_INLINE void DDL_FLASH_ClearFlag_OPBPRD(void)
Clear optionbyte programming completion flag.
__STATIC_INLINE uint32_t DDL_FLASH_IsActiveFlag_WRPRTERR(void)
Write protection error flag.
__STATIC_INLINE uint32_t DDL_FLASH_IsActiveFlag_KEYERR(void)
Flash KEY error flag.
__STATIC_INLINE void DDL_FLASH_ClearFlag_All(void)
Clear all flag.
__STATIC_INLINE void DDL_FLASH_ClearFlag_WADRERR(void)
Clear the address write error flag.
__STATIC_INLINE void DDL_FLASH_EnableIT_EOP(void)
Enable interruption programming or erase end.
__STATIC_INLINE uint32_t DDL_FLASH_IsActiveFlag_ERD(void)
Erase completed flag.
__STATIC_INLINE uint32_t DDL_FLASH_IsActiveFlag_OPUNLOCK(void)
Locking flag for option byte area.
__STATIC_INLINE uint32_t DDL_FLASH_IsActiveFlag_TRIMERR(void)
Trim check error flag.
__STATIC_INLINE void DDL_FLASH_DisableIT_EOP(void)
Disable interruption programming or erase end.
__STATIC_INLINE uint32_t DDL_FLASH_IsActiveFlag_BUSY(void)
FLASH erasing busy flag.
__STATIC_INLINE uint32_t DDL_FLASH_IsEnabledIT_ERR(void)
Get state of interruption Flash error. (0: interrupt disabled, 1: interrupt enabled).
__STATIC_INLINE uint32_t DDL_FLASH_IsActiveFlag_WADRERR(void)
Incorrect address write flag.
__STATIC_INLINE void DDL_FLASH_ClearFlag_ERD(void)
Clear erase completed flag.
ErrorStatus DDL_FLASH_EraseMain(uint32_t type, uint32_t baseAddr)
Erase the main area of the flash.
void DDL_FLASH_ReadData(uint32_t baseAddr, uint32_t *data, uint32_t length)
Erase the systemInfo area of the flash.
ErrorStatus DDL_FLASH_MainProgram(uint32_t baseAddr, uint32_t *data, uint32_t numWords)
Program the systemInfo area of the flash.
void DDL_FLASH_WriteData(uint32_t baseAddr, uint32_t *data, uint32_t length)
Erase the systemInfo area of the flash.
void DDL_FLASH_OPT_StructInit(DDL_FLASH_OPT_InitTypeDef *FLASH_OPT_InitStruct)
Set each DDL_FLASH_OPT_InitTypeDef field to default value.
ErrorStatus DDL_FLASH_OptionByteProgram(DDL_FLASH_OPT_InitTypeDef *FLASH_OPT_InitStruct)
Flash option byte programming.
#define FLASH_DDL_OPT_LOCK
#define FLASH_DDL_OPT_KEY2
#define FLASH_DDL_MAIN_KEY1
#define FLASH_DDL_MAIN_KEY2
#define FLASH_DDL_OPT_KEY1
#define FLASH_DDL_MAIN_LOCK
#define __DDL_FLASH_CALCULATE_BOOT_ADDRESS(__BOOT_ADDR__)
Flash Options Byte Structure definition.
uint32_t readProtectionLevel
uint32_t wwdtSoftwareEnable
uint32_t writeProtectionEnable
uint32_t writeProtectionSectors
uint32_t iwdtSoftwareEnable