g32r4xx_ddl_lptmr.h

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/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef G32R4xx_DDL_LPTMR_H
#define G32R4xx_DDL_LPTMR_H
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* Includes ------------------------------------------------------------------*/
#include "g32r4xx.h"

 
#if defined (LPTMR)

 
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
#if defined(USE_FULL_DDL_DRIVER)

typedef struct
{
  uint16_t Prescaler;         
 
  uint32_t WakeUpValue;       
} DDL_LPTMR_InitTypeDef;

#endif /* USE_FULL_DDL_DRIVER */
 
/* Exported constants --------------------------------------------------------*/

#define DDL_LPTMR_STS_RUF  LPTMR_SR_RU      
#define DDL_LPTMR_STS_PUF  LPTMR_SR_PU      
#define DDL_LPTMR_STS_WKF  LPTMR_SR_WK_STS  

#define DDL_LPTMR_INT_WKEN  LPTMR_CR_IREN  
 
/* Exported macro ------------------------------------------------------------*/

#define DDL_LPTMR_WriteReg(__INSTANCE__,  __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))

#define DDL_LPTMR_ReadReg(__INSTANCE__,  __REG__) READ_REG((__INSTANCE__)->__REG__)
 
/* Exported functions --------------------------------------------------------*/


__STATIC_INLINE void DDL_LPTMR_Enable(LPTMR_TypeDef *LPTMRx)
{
  SET_BIT(LPTMRx->CR, LPTMR_CR_EN);
}

__STATIC_INLINE void DDL_LPTMR_Disable(LPTMR_TypeDef *LPTMRx)
{
  CLEAR_BIT(LPTMRx->CR, LPTMR_CR_EN);
}

__STATIC_INLINE void DDL_LPTMR_EnableClk(void)
{
  SET_BIT(PMU->CR, PMU_CR_LPTMRCEN);
}

__STATIC_INLINE void DDL_LPTMR_DisableClk(void)
{
  CLEAR_BIT(PMU->CR, PMU_CR_LPTMRCEN);
}

__STATIC_INLINE void DDL_LPTMR_SetPrescaler(LPTMR_TypeDef *LPTMRx, uint32_t Prescaler)
{
  WRITE_REG(LPTMRx->PSC, Prescaler);
}

__STATIC_INLINE uint32_t DDL_LPTMR_GetPrescaler(LPTMR_TypeDef *LPTMRx)
{
  return (uint32_t)(READ_REG(LPTMRx->PSC));
}

__STATIC_INLINE void DDL_LPTMR_SetWakeUpValue(LPTMR_TypeDef *LPTMRx, uint32_t Value)
{
  WRITE_REG(LPTMRx->WVR, Value);
}

__STATIC_INLINE uint32_t DDL_LPTMR_GetWakeUpValue(LPTMR_TypeDef *LPTMRx)
{
  return (uint32_t)(READ_REG(LPTMRx->WVR));
}


__STATIC_INLINE void DDL_LPTMR_ClearFlag_WakeUp(LPTMR_TypeDef *LPTMRx)
{
    /* Read the current status register value */
    uint32_t regVal = READ_REG(LPTMRx->SR);
 
    /* Clear the DDL_LPTMR_STS_WKF bit by writing 0 */
    regVal &= ~DDL_LPTMR_STS_WKF;
 
    /* Write the updated value back to SR */
    WRITE_REG(LPTMRx->SR, regVal);
}

__STATIC_INLINE uint32_t DDL_LPTMR_IsActiveFlag_ReloadUpdate(LPTMR_TypeDef *LPTMRx)
{
  return ((READ_BIT(LPTMRx->SR, DDL_LPTMR_STS_RUF) == (DDL_LPTMR_STS_RUF)) ? 1UL : 0UL);
}

__STATIC_INLINE uint32_t DDL_LPTMR_IsActiveFlag_PrescalerUpdate(LPTMR_TypeDef *LPTMRx)
{
  return ((READ_BIT(LPTMRx->SR, DDL_LPTMR_STS_PUF) == (DDL_LPTMR_STS_PUF)) ? 1UL : 0UL);
}

__STATIC_INLINE uint32_t DDL_LPTMR_IsActiveFlag_WakeUp(LPTMR_TypeDef *LPTMRx)
{
  return ((READ_BIT(LPTMRx->SR, DDL_LPTMR_STS_WKF) == (DDL_LPTMR_STS_WKF)) ? 1UL : 0UL);
}



__STATIC_INLINE void DDL_LPTMR_EnableIT_WakeUp(LPTMR_TypeDef *LPTMRx)
{
  SET_BIT(LPTMRx->CR, DDL_LPTMR_INT_WKEN);
}

__STATIC_INLINE void DDL_LPTMR_DisableIT_WakeUp(LPTMR_TypeDef *LPTMRx)
{
  CLEAR_BIT(LPTMRx->CR, DDL_LPTMR_INT_WKEN);
}

 
#if defined(USE_FULL_DDL_DRIVER)
/* Initialisation and deinitialisation functions */
void DDL_LPTMR_StructInit(DDL_LPTMR_InitTypeDef *LPTMR_InitStruct);
ErrorStatus DDL_LPTMR_DeInit(LPTMR_TypeDef *LPTMRx);
ErrorStatus DDL_LPTMR_Init(LPTMR_TypeDef *LPTMRx, DDL_LPTMR_InitTypeDef *LPTMR_InitStruct);
#endif /* USE_FULL_DDL_DRIVER */




 
#endif /* LPTMR */

 
#ifdef __cplusplus
}
#endif
 
#endif /* G32R4xx_DDL_LPTMR_H */