g32r4xx_ddl_usart.h

Go to the documentation of this file.

 
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef G32R4xx_DDL_USART_H
#define G32R4xx_DDL_USART_H
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* Includes ------------------------------------------------------------------*/
#include "g32r4xx.h"

 
#if defined (USART1) || defined (USART2)

 
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
 
/* Private constants ---------------------------------------------------------*/
 
/* Defines used for the bit position in the register and perform offsets*/
#define USART_POSITION_GTPR_GT                         USART_GTPSC_GRDT_Pos
 
/* Private macros ------------------------------------------------------------*/
#if defined(USE_FULL_DDL_DRIVER)
#endif /*USE_FULL_DDL_DRIVER*/
 
/* Exported types ------------------------------------------------------------*/
#if defined(USE_FULL_DDL_DRIVER)

typedef struct
{
  uint32_t BaudRate;                  
 
  uint32_t DataWidth;                 
 
  uint32_t StopBits;                  
 
  uint32_t Parity;                    
 
  uint32_t TransferDirection;         
 
  uint32_t HardwareFlowControl;       
 
  uint32_t OverSampling;              
 
} DDL_USART_InitTypeDef;

typedef struct
{
  uint32_t ClockOutput;               
 
  uint32_t ClockPolarity;             
 
  uint32_t ClockPhase;                
 
  uint32_t LastBitClockPulse;         
 
} DDL_USART_ClockInitTypeDef;

#endif /* USE_FULL_DDL_DRIVER */
 
/* Exported constants --------------------------------------------------------*/

#define DDL_USART_STS_PEFLG     USART_STS_PEFLG     
#define DDL_USART_STS_FEFLG     USART_STS_FEFLG     
#define DDL_USART_STS_NEFLG     USART_STS_NEFLG     
#define DDL_USART_STS_OVREFLG   USART_STS_OVREFLG   
#define DDL_USART_STS_IDLEFLG   USART_STS_IDLEFLG   
#define DDL_USART_STS_RXBNEFLG  USART_STS_RXBNEFLG  
#define DDL_USART_STS_TXCFLG    USART_STS_TXCFLG    
#define DDL_USART_STS_TXBEFLG   USART_STS_TXBEFLG   
#define DDL_USART_STS_LBDFLG    USART_STS_LBDFLG    
#define DDL_USART_STS_CTSFLG    USART_STS_CTSFLG    

#define DDL_USART_CTRL1_IDLEIEN   USART_CTRL1_IDLEIEN   
#define DDL_USART_CTRL1_RXBNEIEN  USART_CTRL1_RXBNEIEN  
#define DDL_USART_CTRL1_TXCIEN    USART_CTRL1_TXCIEN    
#define DDL_USART_CTRL1_TXBEIEN   USART_CTRL1_TXBEIEN   
#define DDL_USART_CTRL1_PEIEN     USART_CTRL1_PEIEN     
#define DDL_USART_CTRL2_LBDIEN    USART_CTRL2_LBDIEN    
#define DDL_USART_CTRL3_ERRIEN    USART_CTRL3_ERRIEN    
#define DDL_USART_CTRL3_CTSIEN    USART_CTRL3_CTSIEN    

#define DDL_USART_DIRECTION_NONE   0x00000000U                           
#define DDL_USART_DIRECTION_RX     USART_CTRL1_RXEN                      
#define DDL_USART_DIRECTION_TX     USART_CTRL1_TXEN                      
#define DDL_USART_DIRECTION_TX_RX  (USART_CTRL1_TXEN |USART_CTRL1_RXEN)  

#define DDL_USART_PARITY_NONE  0x00000000U                            
#define DDL_USART_PARITY_EVEN  USART_CTRL1_PCEN                       
#define DDL_USART_PARITY_ODD   (USART_CTRL1_PCEN | USART_CTRL1_PCFG)  

#define DDL_USART_WAKEUP_IDLELINE     0x00000000U          
#define DDL_USART_WAKEUP_ADDRESSMARK  USART_CTRL1_WUPMCFG  

#define DDL_USART_DATAWIDTH_8B  0x00000000U         
#define DDL_USART_DATAWIDTH_9B  USART_CTRL1_DBLCFG  

#define DDL_USART_OVERSAMPLING_16  0x00000000U         
#define DDL_USART_OVERSAMPLING_8   USART_CTRL1_OSMCFG  
 
#if defined(USE_FULL_DDL_DRIVER)
 
#define DDL_USART_CLOCK_DISABLE  0x00000000U        
#define DDL_USART_CLOCK_ENABLE   USART_CTRL2_CLKEN  
#endif /*USE_FULL_DDL_DRIVER*/

#define DDL_USART_LASTCLKPULSE_NO_OUTPUT  0x00000000U          
#define DDL_USART_LASTCLKPULSE_OUTPUT     USART_CTRL2_LBCPOEN  

#define DDL_USART_PHASE_1EDGE  0x00000000U       
#define DDL_USART_PHASE_2EDGE  USART_CTRL2_CPHA  

#define DDL_USART_POLARITY_LOW   0x00000000U       
#define DDL_USART_POLARITY_HIGH  USART_CTRL2_CPOL  

#define DDL_USART_STOPBITS_0_5  USART_CTRL2_STOPCFG_0  
#define DDL_USART_STOPBITS_1    0x00000000U            
#define DDL_USART_STOPBITS_1_5  USART_CTRL2_STOPCFG    
#define DDL_USART_STOPBITS_2    USART_CTRL2_STOPCFG_1  

#define DDL_USART_HWCONTROL_NONE     0x00000000U                              
#define DDL_USART_HWCONTROL_RTS      USART_CTRL3_RTSEN                        
#define DDL_USART_HWCONTROL_CTS      USART_CTRL3_CTSEN                        
#define DDL_USART_HWCONTROL_RTS_CTS  (USART_CTRL3_RTSEN | USART_CTRL3_CTSEN)  

#define DDL_USART_IRDA_POWER_NORMAL  0x00000000U         
#define DDL_USART_IRDA_POWER_LOW     USART_CTRL3_IRLPEN  

#define DDL_USART_LINBREAK_DETECT_10B  0x00000000U          
#define DDL_USART_LINBREAK_DETECT_11B  USART_CTRL2_LBDLCFG  

#define DDL_USART_SAMPLING_SINGLE  USART_CTRL3_SAMCFG  
#define DDL_USART_SAMPLING_TRIPLE  0x00000000U         

 
/* Exported macro ------------------------------------------------------------*/


#define DDL_USART_WriteReg(__INSTANCE__,  __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))

#define DDL_USART_ReadReg(__INSTANCE__,  __REG__) READ_REG(__INSTANCE__->__REG__)


#define __DDL_USART_DIV_SAMPLING8_100(__PERIPHCLK__,   __BAUDRATE__)      ((uint32_t)((((uint64_t)(__PERIPHCLK__))*25)/(2*((uint64_t)(__BAUDRATE__)))))
#define __DDL_USART_DIVMANT_SAMPLING8(__PERIPHCLK__,   __BAUDRATE__)      (__DDL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__))/100)
#define __DDL_USART_DIVFRAQ_SAMPLING8(__PERIPHCLK__,   __BAUDRATE__)      ((((__DDL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__)) - (__DDL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 8)\
                                                                         + 50) / 100)
/* UART BRR = mantissa + overflow + fraction
            = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */
#define __DDL_USART_DIV_SAMPLING8(__PERIPHCLK__,       __BAUDRATE__)             (((__DDL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
                                                                            ((__DDL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0xF8) << 1)) + \
                                                                           (__DDL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0x07))

#define __DDL_USART_DIV_SAMPLING16_100(__PERIPHCLK__,  __BAUDRATE__)     ((uint32_t)((((uint64_t)(__PERIPHCLK__))*25)/(4*((uint64_t)(__BAUDRATE__)))))
#define __DDL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__,  __BAUDRATE__)     (__DDL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100)
#define __DDL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__,  __BAUDRATE__)     ((((__DDL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__DDL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16)\
                                                                         + 50) / 100)
/* USART BRR = mantissa + overflow + fraction
            = (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */
#define __DDL_USART_DIV_SAMPLING16(__PERIPHCLK__,      __BAUDRATE__)            (((__DDL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
                                                                            (__DDL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \
                                                                           (__DDL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F))


 
/* Exported functions --------------------------------------------------------*/



__STATIC_INLINE void DDL_USART_Enable(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL1, USART_CTRL1_UEN);
}

__STATIC_INLINE void DDL_USART_Disable(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL1, USART_CTRL1_UEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabled(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL1, USART_CTRL1_UEN) == (USART_CTRL1_UEN));
}

__STATIC_INLINE void DDL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL1, USART_CTRL1_RXEN);
}

__STATIC_INLINE void DDL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL1, USART_CTRL1_RXEN);
}

__STATIC_INLINE void DDL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL1, USART_CTRL1_TXEN);
}

__STATIC_INLINE void DDL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL1, USART_CTRL1_TXEN);
}

__STATIC_INLINE void DDL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
{
  MODIFY_REG(USARTx->CTRL1, USART_CTRL1_RXEN | USART_CTRL1_TXEN, TransferDirection);
}

__STATIC_INLINE uint32_t DDL_USART_GetTransferDirection(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL1, USART_CTRL1_RXEN | USART_CTRL1_TXEN));
}

__STATIC_INLINE void DDL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
{
  MODIFY_REG(USARTx->CTRL1, USART_CTRL1_PCFG | USART_CTRL1_PCEN, Parity);
}

__STATIC_INLINE uint32_t DDL_USART_GetParity(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL1, USART_CTRL1_PCFG | USART_CTRL1_PCEN));
}

__STATIC_INLINE void DDL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
{
  MODIFY_REG(USARTx->CTRL1, USART_CTRL1_WUPMCFG, Method);
}

__STATIC_INLINE uint32_t DDL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL1, USART_CTRL1_WUPMCFG));
}

__STATIC_INLINE void DDL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
{
  MODIFY_REG(USARTx->CTRL1, USART_CTRL1_DBLCFG, DataWidth);
}

__STATIC_INLINE uint32_t DDL_USART_GetDataWidth(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL1, USART_CTRL1_DBLCFG));
}

__STATIC_INLINE void DDL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
{
  MODIFY_REG(USARTx->CTRL1, USART_CTRL1_OSMCFG, OverSampling);
}

__STATIC_INLINE uint32_t DDL_USART_GetOverSampling(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL1, USART_CTRL1_OSMCFG));
}

__STATIC_INLINE void DDL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
{
  MODIFY_REG(USARTx->CTRL2, USART_CTRL2_LBCPOEN, LastBitClockPulse);
}

__STATIC_INLINE uint32_t DDL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL2, USART_CTRL2_LBCPOEN));
}

__STATIC_INLINE void DDL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
{
  MODIFY_REG(USARTx->CTRL2, USART_CTRL2_CPHA, ClockPhase);
}

__STATIC_INLINE uint32_t DDL_USART_GetClockPhase(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL2, USART_CTRL2_CPHA));
}

__STATIC_INLINE void DDL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
{
  MODIFY_REG(USARTx->CTRL2, USART_CTRL2_CPOL, ClockPolarity);
}

__STATIC_INLINE uint32_t DDL_USART_GetClockPolarity(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL2, USART_CTRL2_CPOL));
}

__STATIC_INLINE void DDL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
{
  MODIFY_REG(USARTx->CTRL2, USART_CTRL2_CPHA | USART_CTRL2_CPOL | USART_CTRL2_LBCPOEN, Phase | Polarity | LBCPOutput);
}

__STATIC_INLINE void DDL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL2, USART_CTRL2_CLKEN);
}

__STATIC_INLINE void DDL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL2, USART_CTRL2_CLKEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL2, USART_CTRL2_CLKEN) == (USART_CTRL2_CLKEN));
}

__STATIC_INLINE void DDL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
{
  MODIFY_REG(USARTx->CTRL2, USART_CTRL2_STOPCFG, StopBits);
}

__STATIC_INLINE uint32_t DDL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL2, USART_CTRL2_STOPCFG));
}

__STATIC_INLINE void DDL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
                                              uint32_t StopBits)
{
  MODIFY_REG(USARTx->CTRL1, USART_CTRL1_PCFG | USART_CTRL1_PCEN | USART_CTRL1_DBLCFG, Parity | DataWidth);
  MODIFY_REG(USARTx->CTRL2, USART_CTRL2_STOPCFG, StopBits);
}

__STATIC_INLINE void DDL_USART_SetNodeAddress(USART_TypeDef *USARTx, uint32_t NodeAddress)
{
  MODIFY_REG(USARTx->CTRL2, USART_CTRL2_ADDR, (NodeAddress & USART_CTRL2_ADDR));
}

__STATIC_INLINE uint32_t DDL_USART_GetNodeAddress(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL2, USART_CTRL2_ADDR));
}

__STATIC_INLINE void DDL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL3, USART_CTRL3_RTSEN);
}

__STATIC_INLINE void DDL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL3, USART_CTRL3_RTSEN);
}

__STATIC_INLINE void DDL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL3, USART_CTRL3_CTSEN);
}

__STATIC_INLINE void DDL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL3, USART_CTRL3_CTSEN);
}

__STATIC_INLINE void DDL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
{
  MODIFY_REG(USARTx->CTRL3, USART_CTRL3_RTSEN | USART_CTRL3_CTSEN, HardwareFlowControl);
}

__STATIC_INLINE uint32_t DDL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL3, USART_CTRL3_RTSEN | USART_CTRL3_CTSEN));
}

__STATIC_INLINE void DDL_USART_SetDEDeassertionTime(USART_TypeDef *USARTx, uint32_t Time)
{
  MODIFY_REG(USARTx->CTRL1, USART_CTRL1_DEDT, Time << USART_CTRL1_DEDT_Pos);
}

__STATIC_INLINE uint32_t DDL_USART_GetDEDeassertionTime(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL1, USART_CTRL1_DEDT) >> USART_CTRL1_DEDT_Pos);
}

__STATIC_INLINE void DDL_USART_SetDEAssertionTime(USART_TypeDef *USARTx, uint32_t Time)
{
  MODIFY_REG(USARTx->CTRL1, USART_CTRL1_DEAT, Time << USART_CTRL1_DEAT_Pos);
}

__STATIC_INLINE uint32_t DDL_USART_GetDEAssertionTime(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL1, USART_CTRL1_DEAT) >> USART_CTRL1_DEAT_Pos);
}

__STATIC_INLINE void DDL_USART_EnableDEMode(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL3, USART_CTRL3_DEM);
}

__STATIC_INLINE void DDL_USART_DisableDEMode(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL3, USART_CTRL3_DEM);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledDEMode(USART_TypeDef *USARTx)
{
  return ((READ_BIT(USARTx->CTRL3, USART_CTRL3_DEM) == (USART_CTRL3_DEM)) ? 1UL : 0UL);
}

__STATIC_INLINE void DDL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
                                          uint32_t BaudRate)
{
  uint32_t temp, intDiv, fractionalDiv;
  if (OverSampling == DDL_USART_OVERSAMPLING_8)
  {
    intDiv = ((25 * PeriphClk) / (2 * BaudRate));
  }
  else
  {
    intDiv = ((25 * PeriphClk) / (4 * BaudRate));
  }
 
  temp = (intDiv / 100) << 4;
  fractionalDiv = intDiv - (100 * (temp >> 4));
 
  if (OverSampling == DDL_USART_OVERSAMPLING_8)
  {
    temp |= ((((fractionalDiv * 8) + 50) / 100)) & ((uint8_t)0x07);
  }
  else
  {
    temp |= ((((fractionalDiv * 16) + 50) / 100)) & ((uint8_t)0x0F);
  }
 
  USARTx->BR = temp;
}

__STATIC_INLINE uint32_t DDL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
{
  uint32_t usartdiv = 0x0U;
  uint32_t brrresult = 0x0U;
 
  usartdiv = USARTx->BR;
 
  if (OverSampling == DDL_USART_OVERSAMPLING_8)
  {
    if ((usartdiv & 0xFFF7U) != 0U)
    {
      usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
      brrresult = (PeriphClk * 2U) / usartdiv;
    }
  }
  else
  {
    if ((usartdiv & 0xFFFFU) != 0U)
    {
      brrresult = PeriphClk / usartdiv;
    }
  }
  return (brrresult);
}

__STATIC_INLINE void DDL_USART_SetSampleMethod(USART_TypeDef *USARTx, uint32_t Sample)
{
  MODIFY_REG(USARTx->CTRL3, USART_CTRL3_SAMCFG, Sample);
}



__STATIC_INLINE void DDL_USART_EnableIrda(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL3, USART_CTRL3_IREN);
}

__STATIC_INLINE void DDL_USART_DisableIrda(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL3, USART_CTRL3_IREN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledIrda(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL3, USART_CTRL3_IREN) == (USART_CTRL3_IREN));
}

__STATIC_INLINE void DDL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
{
  MODIFY_REG(USARTx->CTRL3, USART_CTRL3_IRLPEN, PowerMode);
}

__STATIC_INLINE uint32_t DDL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL3, USART_CTRL3_IRLPEN));
}

__STATIC_INLINE void DDL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
{
  MODIFY_REG(USARTx->GTPSC, USART_GTPSC_PSC, PrescalerValue);
}

__STATIC_INLINE uint32_t DDL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->GTPSC, USART_GTPSC_PSC));
}



__STATIC_INLINE void DDL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL3, USART_CTRL3_SCNACKEN);
}

__STATIC_INLINE void DDL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL3, USART_CTRL3_SCNACKEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL3, USART_CTRL3_SCNACKEN) == (USART_CTRL3_SCNACKEN));
}

__STATIC_INLINE void DDL_USART_EnableSmartcard(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL3, USART_CTRL3_SCEN);
}

__STATIC_INLINE void DDL_USART_DisableSmartcard(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL3, USART_CTRL3_SCEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL3, USART_CTRL3_SCEN) == (USART_CTRL3_SCEN));
}

__STATIC_INLINE void DDL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
{
  MODIFY_REG(USARTx->GTPSC, USART_GTPSC_PSC, PrescalerValue);
}

__STATIC_INLINE uint32_t DDL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->GTPSC, USART_GTPSC_PSC));
}

__STATIC_INLINE void DDL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
{
  MODIFY_REG(USARTx->GTPSC, USART_GTPSC_GRDT, GuardTime << USART_POSITION_GTPR_GT);
}

__STATIC_INLINE uint32_t DDL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->GTPSC, USART_GTPSC_GRDT) >> USART_POSITION_GTPR_GT);
}



__STATIC_INLINE void DDL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL3, USART_CTRL3_HDEN);
}

__STATIC_INLINE void DDL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL3, USART_CTRL3_HDEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL3, USART_CTRL3_HDEN) == (USART_CTRL3_HDEN));
}



__STATIC_INLINE void DDL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
{
  MODIFY_REG(USARTx->CTRL2, USART_CTRL2_LBDLCFG, LINBDLength);
}

__STATIC_INLINE uint32_t DDL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx)
{
  return (uint32_t)(READ_BIT(USARTx->CTRL2, USART_CTRL2_LBDLCFG));
}

__STATIC_INLINE void DDL_USART_EnableLIN(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL2, USART_CTRL2_LINMEN);
}

__STATIC_INLINE void DDL_USART_DisableLIN(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL2, USART_CTRL2_LINMEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledLIN(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL2, USART_CTRL2_LINMEN) == (USART_CTRL2_LINMEN));
}



__STATIC_INLINE void DDL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
{
  /* In Asynchronous mode, the following bits must be kept cleared:
  - LINEN, CLKEN bits in the USART_CTRL2 register,
  - SCEN, IREN and HDSEL bits in the USART_CTRL3 register.*/
  CLEAR_BIT(USARTx->CTRL2, (USART_CTRL2_LINMEN | USART_CTRL2_CLKEN));
  CLEAR_BIT(USARTx->CTRL3, (USART_CTRL3_SCEN | USART_CTRL3_IREN | USART_CTRL3_HDEN));
}

__STATIC_INLINE void DDL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
{
  /* In Synchronous mode, the following bits must be kept cleared:
  - LINEN bit in the USART_CTRL2 register,
  - SCEN, IREN and HDSEL bits in the USART_CTRL3 register.*/
  CLEAR_BIT(USARTx->CTRL2, (USART_CTRL2_LINMEN));
  CLEAR_BIT(USARTx->CTRL3, (USART_CTRL3_SCEN | USART_CTRL3_IREN | USART_CTRL3_HDEN));
  /* set the UART/USART in Synchronous mode */
  SET_BIT(USARTx->CTRL2, USART_CTRL2_CLKEN);
}

__STATIC_INLINE void DDL_USART_ConfigLINMode(USART_TypeDef *USARTx)
{
  /* In LIN mode, the following bits must be kept cleared:
  - STOP and CLKEN bits in the USART_CTRL2 register,
  - IREN, SCEN and HDSEL bits in the USART_CTRL3 register.*/
  CLEAR_BIT(USARTx->CTRL2, (USART_CTRL2_CLKEN | USART_CTRL2_STOPCFG));
  CLEAR_BIT(USARTx->CTRL3, (USART_CTRL3_IREN | USART_CTRL3_SCEN | USART_CTRL3_HDEN));
  /* Set the UART/USART in LIN mode */
  SET_BIT(USARTx->CTRL2, USART_CTRL2_LINMEN);
}

__STATIC_INLINE void DDL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
{
  /* In Half Duplex mode, the following bits must be kept cleared:
  - LINEN and CLKEN bits in the USART_CTRL2 register,
  - SCEN and IREN bits in the USART_CTRL3 register.*/
  CLEAR_BIT(USARTx->CTRL2, (USART_CTRL2_LINMEN | USART_CTRL2_CLKEN));
  CLEAR_BIT(USARTx->CTRL3, (USART_CTRL3_SCEN | USART_CTRL3_IREN));
  /* set the UART/USART in Half Duplex mode */
  SET_BIT(USARTx->CTRL3, USART_CTRL3_HDEN);
}

__STATIC_INLINE void DDL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
{
  /* In Smartcard mode, the following bits must be kept cleared:
  - LINEN bit in the USART_CTRL2 register,
  - IREN and HDSEL bits in the USART_CTRL3 register.*/
  CLEAR_BIT(USARTx->CTRL2, (USART_CTRL2_LINMEN));
  CLEAR_BIT(USARTx->CTRL3, (USART_CTRL3_IREN | USART_CTRL3_HDEN));
  /* Configure Stop bits to 1.5 bits */
  /* Synchronous mode is activated by default */
  SET_BIT(USARTx->CTRL2, (USART_CTRL2_STOPCFG | USART_CTRL2_CLKEN));
  /* set the UART/USART in Smartcard mode */
  SET_BIT(USARTx->CTRL3, USART_CTRL3_SCEN);
}

__STATIC_INLINE void DDL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
{
  /* In IRDA mode, the following bits must be kept cleared:
  - LINEN, STOP and CLKEN bits in the USART_CTRL2 register,
  - SCEN and HDSEL bits in the USART_CTRL3 register.*/
  CLEAR_BIT(USARTx->CTRL2, (USART_CTRL2_LINMEN | USART_CTRL2_CLKEN | USART_CTRL2_STOPCFG));
  CLEAR_BIT(USARTx->CTRL3, (USART_CTRL3_SCEN | USART_CTRL3_HDEN));
  /* set the UART/USART in IRDA mode */
  SET_BIT(USARTx->CTRL3, USART_CTRL3_IREN);
}

__STATIC_INLINE void DDL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
{
  /* In Multi Processor mode, the following bits must be kept cleared:
  - LINEN and CLKEN bits in the USART_CTRL2 register,
  - IREN, SCEN and HDSEL bits in the USART_CTRL3 register.*/
  CLEAR_BIT(USARTx->CTRL2, (USART_CTRL2_LINMEN | USART_CTRL2_CLKEN));
  CLEAR_BIT(USARTx->CTRL3, (USART_CTRL3_SCEN | USART_CTRL3_HDEN | USART_CTRL3_IREN));
}



__STATIC_INLINE uint32_t DDL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->STS, USART_STS_PEFLG) == (USART_STS_PEFLG));
}

__STATIC_INLINE void DDL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
{
  __IO uint32_t tmpreg;
  tmpreg = USARTx->STS;
  (void) tmpreg;
  tmpreg = USARTx->DATA;
  (void) tmpreg;
}

__STATIC_INLINE uint32_t DDL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->STS, USART_STS_FEFLG) == (USART_STS_FEFLG));
}

__STATIC_INLINE void DDL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
{
  __IO uint32_t tmpreg;
  tmpreg = USARTx->STS;
  (void) tmpreg;
  tmpreg = USARTx->DATA;
  (void) tmpreg;
}

__STATIC_INLINE uint32_t DDL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->STS, USART_STS_NEFLG) == (USART_STS_NEFLG));
}

__STATIC_INLINE void DDL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
{
  __IO uint32_t tmpreg;
  tmpreg = USARTx->STS;
  (void) tmpreg;
  tmpreg = USARTx->DATA;
  (void) tmpreg;
}

__STATIC_INLINE uint32_t DDL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->STS, USART_STS_OVREFLG) == (USART_STS_OVREFLG));
}

__STATIC_INLINE void DDL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
{
  __IO uint32_t tmpreg;
  tmpreg = USARTx->STS;
  (void) tmpreg;
  tmpreg = USARTx->DATA;
  (void) tmpreg;
}

__STATIC_INLINE uint32_t DDL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->STS, USART_STS_IDLEFLG) == (USART_STS_IDLEFLG));
}

__STATIC_INLINE void DDL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
{
  __IO uint32_t tmpreg;
  tmpreg = USARTx->STS;
  (void) tmpreg;
  tmpreg = USARTx->DATA;
  (void) tmpreg;
}

__STATIC_INLINE uint32_t DDL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->STS, USART_STS_RXBNEFLG) == (USART_STS_RXBNEFLG));
}

__STATIC_INLINE void DDL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx)
{
  WRITE_REG(USARTx->STS, ~(USART_STS_RXBNEFLG));
}

__STATIC_INLINE uint32_t DDL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->STS, USART_STS_TXCFLG) == (USART_STS_TXCFLG));
}

__STATIC_INLINE void DDL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
{
  WRITE_REG(USARTx->STS, ~(USART_STS_TXCFLG));
}

__STATIC_INLINE uint32_t DDL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->STS, USART_STS_TXBEFLG) == (USART_STS_TXBEFLG));
}

__STATIC_INLINE uint32_t DDL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->STS, USART_STS_LBDFLG) == (USART_STS_LBDFLG));
}

__STATIC_INLINE void DDL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
{
  WRITE_REG(USARTx->STS, ~(USART_STS_LBDFLG));
}

__STATIC_INLINE uint32_t DDL_USART_IsActiveFlag_CTS(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->STS, USART_STS_CTSFLG) == (USART_STS_CTSFLG));
}

__STATIC_INLINE void DDL_USART_ClearFlag_CTS(USART_TypeDef *USARTx)
{
  WRITE_REG(USARTx->STS, ~(USART_STS_CTSFLG));
}

__STATIC_INLINE uint32_t DDL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL1, USART_CTRL1_TXBF) == (USART_CTRL1_TXBF));
}

__STATIC_INLINE uint32_t DDL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL1, USART_CTRL1_RXMUTEEN) == (USART_CTRL1_RXMUTEEN));
}



__STATIC_INLINE void DDL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL1, USART_CTRL1_IDLEIEN);
}

__STATIC_INLINE void DDL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL1, USART_CTRL1_IDLEIEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL1, USART_CTRL1_IDLEIEN) == (USART_CTRL1_IDLEIEN));
}

__STATIC_INLINE void DDL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL1, USART_CTRL1_RXBNEIEN);
}

__STATIC_INLINE void DDL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL1, USART_CTRL1_RXBNEIEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL1, USART_CTRL1_RXBNEIEN) == (USART_CTRL1_RXBNEIEN));
}

__STATIC_INLINE void DDL_USART_EnableIT_TC(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL1, USART_CTRL1_TXCIEN);
}

__STATIC_INLINE void DDL_USART_DisableIT_TC(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL1, USART_CTRL1_TXCIEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL1, USART_CTRL1_TXCIEN) == (USART_CTRL1_TXCIEN));
}

__STATIC_INLINE void DDL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL1, USART_CTRL1_TXBEIEN);
}

__STATIC_INLINE void DDL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL1, USART_CTRL1_TXBEIEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL1, USART_CTRL1_TXBEIEN) == (USART_CTRL1_TXBEIEN));
}

__STATIC_INLINE void DDL_USART_EnableIT_PE(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL1, USART_CTRL1_PEIEN);
}

__STATIC_INLINE void DDL_USART_DisableIT_PE(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL1, USART_CTRL1_PEIEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL1, USART_CTRL1_PEIEN) == (USART_CTRL1_PEIEN));
}

__STATIC_INLINE void DDL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL2, USART_CTRL2_LBDIEN);
}

__STATIC_INLINE void DDL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL2, USART_CTRL2_LBDIEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL2, USART_CTRL2_LBDIEN) == (USART_CTRL2_LBDIEN));
}

__STATIC_INLINE void DDL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL3, USART_CTRL3_ERRIEN);
}

__STATIC_INLINE void DDL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL3, USART_CTRL3_ERRIEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL3, USART_CTRL3_ERRIEN) == (USART_CTRL3_ERRIEN));
}

__STATIC_INLINE void DDL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL3, USART_CTRL3_CTSIEN);
}

__STATIC_INLINE void DDL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL3, USART_CTRL3_CTSIEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL3, USART_CTRL3_CTSIEN) == (USART_CTRL3_CTSIEN));
}



__STATIC_INLINE void DDL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL3, USART_CTRL3_DMARXEN);
}

__STATIC_INLINE void DDL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL3, USART_CTRL3_DMARXEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL3, USART_CTRL3_DMARXEN) == (USART_CTRL3_DMARXEN));
}

__STATIC_INLINE void DDL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL3, USART_CTRL3_DMATXEN);
}

__STATIC_INLINE void DDL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL3, USART_CTRL3_DMATXEN);
}

__STATIC_INLINE uint32_t DDL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
{
  return (READ_BIT(USARTx->CTRL3, USART_CTRL3_DMATXEN) == (USART_CTRL3_DMATXEN));
}

__STATIC_INLINE uint32_t DDL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx)
{
  /* return address of DR register */
  return ((uint32_t) &(USARTx->DATA));
}



__STATIC_INLINE uint8_t DDL_USART_ReceiveData8(USART_TypeDef *USARTx)
{
  return (uint8_t)(READ_BIT(USARTx->DATA, USART_DATA_DATA));
}

__STATIC_INLINE uint16_t DDL_USART_ReceiveData9(USART_TypeDef *USARTx)
{
  return (uint16_t)(READ_BIT(USARTx->DATA, USART_DATA_DATA));
}

__STATIC_INLINE void DDL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
{
  USARTx->DATA = Value;
}

__STATIC_INLINE void DDL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
{
  USARTx->DATA = Value & 0x1FFU;
}



__STATIC_INLINE void DDL_USART_RequestBreakSending(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL1, USART_CTRL1_TXBF);
}

__STATIC_INLINE void DDL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
{
  SET_BIT(USARTx->CTRL1, USART_CTRL1_RXMUTEEN);
}

__STATIC_INLINE void DDL_USART_RequestExitMuteMode(USART_TypeDef *USARTx)
{
  CLEAR_BIT(USARTx->CTRL1, USART_CTRL1_RXMUTEEN);
}

 
#if defined(USE_FULL_DDL_DRIVER)
ErrorStatus DDL_USART_DeInit(USART_TypeDef *USARTx);
ErrorStatus DDL_USART_Init(USART_TypeDef *USARTx, DDL_USART_InitTypeDef *USART_InitStruct);
void        DDL_USART_StructInit(DDL_USART_InitTypeDef *USART_InitStruct);
ErrorStatus DDL_USART_ClockInit(USART_TypeDef *USARTx, DDL_USART_ClockInitTypeDef *USART_ClockInitStruct);
void        DDL_USART_ClockStructInit(DDL_USART_ClockInitTypeDef *USART_ClockInitStruct);
#endif /* USE_FULL_DDL_DRIVER */


 
#endif /* USART1 || USART2 */

 
#ifdef __cplusplus
}
#endif
 
#endif /* G32R4xx_DDL_USART_H */