Configuration of ADC hierarchical scope: group regular

Functions
__STATIC_INLINE void	DDL_ADC12_REG_SetTriggerSource (ADC12_TypeDef *ADCx, uint32_t TriggerSource)
	Set ADC group regular conversion trigger source: internal (SW start) or from external peripheral (timer event, external interrupt line).
__STATIC_INLINE uint32_t	DDL_ADC12_REG_GetTriggerSource (ADC12_TypeDef *ADCx)
	Get ADC group regular conversion trigger source: internal (SW start) or from external peripheral (timer event, external interrupt line).
__STATIC_INLINE uint32_t	DDL_ADC12_REG_IsTriggerSourceSWStart (ADC12_TypeDef *ADCx)
	Get ADC group regular conversion trigger source internal (SW start) or external.
__STATIC_INLINE void	DDL_ADC12_REG_SetTriggerEdge (ADC12_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
	Set ADC group regular conversion trigger polarity.
__STATIC_INLINE uint32_t	DDL_ADC12_REG_GetTriggerEdge (ADC12_TypeDef *ADCx)
	Get ADC group regular conversion trigger polarity.
__STATIC_INLINE void	DDL_ADC12_REG_SetSequencerLength (ADC12_TypeDef *ADCx, uint32_t SequencerNbRanks)
	Set ADC group regular sequencer length and scan direction.
__STATIC_INLINE uint32_t	DDL_ADC12_REG_GetSequencerLength (ADC12_TypeDef *ADCx)
	Get ADC group regular sequencer length and scan direction.
__STATIC_INLINE void	DDL_ADC12_REG_SetSequencerDiscont (ADC12_TypeDef *ADCx, uint32_t SeqDiscont)
	Set ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.
__STATIC_INLINE uint32_t	DDL_ADC12_REG_GetSequencerDiscont (ADC12_TypeDef *ADCx)
	Get ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.
__STATIC_INLINE void	DDL_ADC12_REG_SetSequencerRanks (ADC12_TypeDef *ADCx, uint32_t Rank, uint32_t Channel)
	Set ADC group regular sequence: channel on the selected scan sequence rank.
__STATIC_INLINE uint32_t	DDL_ADC12_REG_GetSequencerRanks (ADC12_TypeDef *ADCx, uint32_t Rank)
	Get ADC group regular sequence: channel on the selected scan sequence rank. Refer to description of function DDL_ADC12_REG_SetSequencerLength().
__STATIC_INLINE void	DDL_ADC12_REG_SetContinuousMode (ADC12_TypeDef *ADCx, uint32_t Continuous)
	Set ADC continuous conversion mode on ADC group regular.
__STATIC_INLINE uint32_t	DDL_ADC12_REG_GetContinuousMode (ADC12_TypeDef *ADCx)
	Get ADC continuous conversion mode on ADC group regular.
__STATIC_INLINE void	DDL_ADC12_REG_SetDMATransfer (ADC12_TypeDef *ADCx, uint32_t DMATransfer)
	Set ADC group regular conversion data transfer: no transfer or transfer by DMA, and DMA requests mode.
__STATIC_INLINE uint32_t	DDL_ADC12_REG_GetDMATransfer (ADC12_TypeDef *ADCx)
	Get ADC group regular conversion data transfer: no transfer or transfer by DMA, and DMA requests mode.

Detailed Description

Function Documentation

DDL_ADC12_REG_GetContinuousMode()

__STATIC_INLINE uint32_t DDL_ADC12_REG_GetContinuousMode

(

ADC12_TypeDef *

ADCx

)

Get ADC continuous conversion mode on ADC group regular.

Note

Description of ADC continuous conversion mode:

• single mode: one conversion per trigger
• continuous mode: after the first trigger, following conversions launched successively automatically.

Parameters

ADCx	ADC instance

Return values

Returned

value can be one of the following values: DDL_ADC12_REG_CONV_SINGLE DDL_ADC12_REG_CONV_CONTINUOUS

Definition at line 1307 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_GetDMATransfer()

__STATIC_INLINE uint32_t DDL_ADC12_REG_GetDMATransfer

(

ADC12_TypeDef *

ADCx

)

Get ADC group regular conversion data transfer: no transfer or transfer by DMA, and DMA requests mode.

Note

If transfer by DMA selected, specifies the DMA requests mode:

• Limited mode (One shot mode): DMA transfer requests are stopped when number of DMA data transfers (number of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular.
• Unlimited mode: DMA transfer requests are unlimited, whatever number of DMA data transfers (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular.

If ADC DMA requests mode is set to unlimited and DMA is set to mode non-circular: when DMA transfers size will be reached, DMA will stop transfers of ADC conversions data ADC will raise an overrun error (overrun flag and interruption if enabled).

For devices with several ADC instances: ADC multimode DMA settings are available using function DDL_ADC12_GetMultiDMATransfer().

To configure DMA source address (peripheral address), use function DDL_ADC12_DMA_GetRegAddr().

Parameters

ADCx	ADC instance

Return values

Returned

value can be one of the following values: DDL_ADC12_REG_DMA_TRANSFER_DISABLE DDL_ADC12_REG_DMA_TRANSFER_ENABLE

Definition at line 1375 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_GetSequencerDiscont()

__STATIC_INLINE uint32_t DDL_ADC12_REG_GetSequencerDiscont

(

ADC12_TypeDef *

ADCx

)

Get ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.

Parameters

ADCx	ADC instance

Return values

Returned

value can be one of the following values: DDL_ADC12_REG_SEQ_DISCONT_DISABLE DDL_ADC12_REG_SEQ_DISCONT_1RANK DDL_ADC12_REG_SEQ_DISCONT_2RANKS DDL_ADC12_REG_SEQ_DISCONT_3RANKS DDL_ADC12_REG_SEQ_DISCONT_4RANKS DDL_ADC12_REG_SEQ_DISCONT_5RANKS DDL_ADC12_REG_SEQ_DISCONT_6RANKS DDL_ADC12_REG_SEQ_DISCONT_7RANKS DDL_ADC12_REG_SEQ_DISCONT_8RANKS

Definition at line 1150 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_GetSequencerLength()

__STATIC_INLINE uint32_t DDL_ADC12_REG_GetSequencerLength

(

ADC12_TypeDef *

ADCx

)

Get ADC group regular sequencer length and scan direction.

Note

Description of ADC group regular sequencer features:

• For devices with sequencer fully configurable (function "DDL_ADC12_REG_SetSequencerRanks()" available): sequencer length and each rank affectation to a channel are configurable. This function retrieves:
  • Sequence length: Number of ranks in the scan sequence.
  • Sequence direction: Unless specified in parameters, sequencer scan direction is forward (from rank 1 to rank n). Sequencer ranks are selected using function "DDL_ADC12_REG_SetSequencerRanks()".
• For devices with sequencer not fully configurable (function "DDL_ADC12_REG_SetSequencerChannels()" available): sequencer length and each rank affectation to a channel are defined by channel number. This function retrieves:
  • Sequence length: Number of ranks in the scan sequence is defined by number of channels set in the sequence, rank of each channel is fixed by channel HW number. (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
  • Sequence direction: Unless specified in parameters, sequencer scan direction is forward (from lowest channel number to highest channel number). Sequencer ranks are selected using function "DDL_ADC12_REG_SetSequencerChannels()".

Sequencer disabled is equivalent to sequencer of 1 rank: ADC conversion on only 1 channel.

Parameters

ADCx	ADC instance

Return values

Returned

value can be one of the following values: DDL_ADC12_REG_SEQ_SCAN_DISABLE DDL_ADC12_REG_SEQ_SCAN_ENABLE_2RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_3RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_4RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_5RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_6RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_7RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_8RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_9RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_10RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_11RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_12RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_13RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_14RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_15RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_16RANKS

Definition at line 1103 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_GetSequencerRanks()

__STATIC_INLINE uint32_t DDL_ADC12_REG_GetSequencerRanks	(	ADC12_TypeDef *	ADCx,
		uint32_t	Rank )

Get ADC group regular sequence: channel on the selected scan sequence rank. Refer to description of function DDL_ADC12_REG_SetSequencerLength().

Note

Depending on devices and packages, some channels may not be available. Refer to device datasheet for channels availability.

Usage of the returned channel number:

• To reinject this channel into another function DDL_ADC12_xxx: the returned channel number is only partly formatted on definition of literals DDL_ADC12_CHANNEL_x. Therefore, it has to be compared with parts of literals DDL_ADC12_CHANNEL_x or using helper macro __DDL_ADC12_CHANNEL_TO_DECIMAL_NB(). Then the selected literal DDL_ADC12_CHANNEL_x can be used as parameter for another function.
• To get the channel number in decimal format: process the returned value with the helper macro __DDL_ADC12_CHANNEL_TO_DECIMAL_NB().

Parameters

ADCx	ADC instance
Rank	This parameter can be one of the following values: DDL_ADC12_REG_RANK_1 DDL_ADC12_REG_RANK_2 DDL_ADC12_REG_RANK_3 DDL_ADC12_REG_RANK_4 DDL_ADC12_REG_RANK_5 DDL_ADC12_REG_RANK_6 DDL_ADC12_REG_RANK_7 DDL_ADC12_REG_RANK_8 DDL_ADC12_REG_RANK_9 DDL_ADC12_REG_RANK_10 DDL_ADC12_REG_RANK_11 DDL_ADC12_REG_RANK_12 DDL_ADC12_REG_RANK_13 DDL_ADC12_REG_RANK_14 DDL_ADC12_REG_RANK_15 DDL_ADC12_REG_RANK_16

Return values

Returned

value can be one of the following values: ADC12_CHANNEL_0_NUMBER ADC12_CHANNEL_1_NUMBER ADC12_CHANNEL_2_NUMBER ADC12_CHANNEL_3_NUMBER ADC12_CHANNEL_4_NUMBER ADC12_CHANNEL_5_NUMBER ADC12_CHANNEL_6_NUMBER ADC12_CHANNEL_7_NUMBER ADC12_CHANNEL_8_NUMBER ADC12_CHANNEL_9_NUMBER ADC12_CHANNEL_10_NUMBER ADC12_CHANNEL_11_NUMBER ADC12_CHANNEL_12_NUMBER ADC12_CHANNEL_13_NUMBER ADC12_CHANNEL_14_NUMBER ADC12_CHANNEL_15_NUMBER

Definition at line 1264 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_GetTriggerEdge()

__STATIC_INLINE uint32_t DDL_ADC12_REG_GetTriggerEdge

(

ADC12_TypeDef *

ADCx

)

Get ADC group regular conversion trigger polarity.

Note

Applicable only for trigger source set to external trigger.

Parameters

ADCx	ADC instance

Return values

Returned

value can be one of the following values: DDL_ADC12_REG_TRIG_EXT_RISING DDL_ADC12_REG_TRIG_EXT_DISABLE

Definition at line 993 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_GetTriggerSource()

__STATIC_INLINE uint32_t DDL_ADC12_REG_GetTriggerSource

(

ADC12_TypeDef *

ADCx

)

Get ADC group regular conversion trigger source: internal (SW start) or from external peripheral (timer event, external interrupt line).

Note

Availability of parameters of trigger sources from timer depends on timers availability on the selected device.

Parameters

ADCx	ADC instance

Return values

Returned

value can be one of the following values: DDL_ADC12_REG_TRIG_SOFTWARE DDL_ADC12_REG_TRIG_EXT_TMR1_CC1 DDL_ADC12_REG_TRIG_EXT_TMR1_CC2 DDL_ADC12_REG_TRIG_EXT_TMR1_CC3 DDL_ADC12_REG_TRIG_EXT_TMR2_CC2 DDL_ADC12_REG_TRIG_EXT_TMR3_TRGO DDL_ADC12_REG_TRIG_EXT_TMR4_CC4 DDL_ADC12_REG_TRIG_EXT_EINT_LINE11

Definition at line 951 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_IsTriggerSourceSWStart()

__STATIC_INLINE uint32_t DDL_ADC12_REG_IsTriggerSourceSWStart

(

ADC12_TypeDef *

ADCx

)

Get ADC group regular conversion trigger source internal (SW start) or external.

Parameters

ADCx	ADC instance

Return values

Value

"0" if trigger source external trigger Value "1" if trigger source SW start.

Definition at line 963 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_SetContinuousMode()

__STATIC_INLINE void DDL_ADC12_REG_SetContinuousMode	(	ADC12_TypeDef *	ADCx,
		uint32_t	Continuous )

Set ADC continuous conversion mode on ADC group regular.

Note

Description of ADC continuous conversion mode:

• single mode: one conversion per trigger
• continuous mode: after the first trigger, following conversions launched successively automatically.

It is not possible to enable both ADC group regular continuous mode and sequencer discontinuous mode.

ADC must be disabled or enabled without conversion on going on group regular.

Parameters

ADCx	ADC instance
Continuous	This parameter can be one of the following values: DDL_ADC12_REG_CONV_SINGLE DDL_ADC12_REG_CONV_CONTINUOUS

Return values

None

Definition at line 1291 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_SetDMATransfer()

__STATIC_INLINE void DDL_ADC12_REG_SetDMATransfer	(	ADC12_TypeDef *	ADCx,
		uint32_t	DMATransfer )

Set ADC group regular conversion data transfer: no transfer or transfer by DMA, and DMA requests mode.

Note

If transfer by DMA selected, specifies the DMA requests mode:

• Limited mode (One shot mode): DMA transfer requests are stopped when number of DMA data transfers (number of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular.
• Unlimited mode: DMA transfer requests are unlimited, whatever number of DMA data transfers (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular.

If ADC DMA requests mode is set to unlimited and DMA is set to mode non-circular: when DMA transfers size will be reached, DMA will stop transfers of ADC conversions data ADC will raise an overrun error (overrun flag and interruption if enabled).

For devices with several ADC instances: ADC multimode DMA settings are available using function DDL_ADC12_SetMultiDMATransfer().

To configure DMA source address (peripheral address), use function DDL_ADC12_DMA_GetRegAddr().

ADC must be disabled or enabled without conversion on going on either groups regular or injected.

Parameters

ADCx	ADC instance
DMATransfer	This parameter can be one of the following values: DDL_ADC12_REG_DMA_TRANSFER_DISABLE DDL_ADC12_REG_DMA_TRANSFER_ENABLE

Return values

None

Definition at line 1343 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_SetSequencerDiscont()

__STATIC_INLINE void DDL_ADC12_REG_SetSequencerDiscont	(	ADC12_TypeDef *	ADCx,
		uint32_t	SeqDiscont )

Set ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.

Note

It is not possible to enable both ADC group regular continuous mode and sequencer discontinuous mode.

It is not possible to enable both ADC auto-injected mode and ADC group regular sequencer discontinuous mode.

Parameters

ADCx	ADC instance
SeqDiscont	This parameter can be one of the following values: DDL_ADC12_REG_SEQ_DISCONT_DISABLE DDL_ADC12_REG_SEQ_DISCONT_1RANK DDL_ADC12_REG_SEQ_DISCONT_2RANKS DDL_ADC12_REG_SEQ_DISCONT_3RANKS DDL_ADC12_REG_SEQ_DISCONT_4RANKS DDL_ADC12_REG_SEQ_DISCONT_5RANKS DDL_ADC12_REG_SEQ_DISCONT_6RANKS DDL_ADC12_REG_SEQ_DISCONT_7RANKS DDL_ADC12_REG_SEQ_DISCONT_8RANKS

Return values

None

Definition at line 1129 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_SetSequencerLength()

__STATIC_INLINE void DDL_ADC12_REG_SetSequencerLength	(	ADC12_TypeDef *	ADCx,
		uint32_t	SequencerNbRanks )

Set ADC group regular sequencer length and scan direction.

Note

Description of ADC group regular sequencer features:

• For devices with sequencer fully configurable (function "DDL_ADC12_REG_SetSequencerRanks()" available): sequencer length and each rank affectation to a channel are configurable. This function performs configuration of:
  • Sequence length: Number of ranks in the scan sequence.
  • Sequence direction: Unless specified in parameters, sequencer scan direction is forward (from rank 1 to rank n). Sequencer ranks are selected using function "DDL_ADC12_REG_SetSequencerRanks()".
• For devices with sequencer not fully configurable (function "DDL_ADC12_REG_SetSequencerChannels()" available): sequencer length and each rank affectation to a channel are defined by channel number. This function performs configuration of:
  • Sequence length: Number of ranks in the scan sequence is defined by number of channels set in the sequence, rank of each channel is fixed by channel HW number. (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
  • Sequence direction: Unless specified in parameters, sequencer scan direction is forward (from lowest channel number to highest channel number). Sequencer ranks are selected using function "DDL_ADC12_REG_SetSequencerChannels()".

Sequencer disabled is equivalent to sequencer of 1 rank: ADC conversion on only 1 channel.

ADC must be disabled or enabled without conversion on going on group regular.

Parameters

ADCx

ADC instance

SequencerNbRanks

This parameter can be one of the following values: DDL_ADC12_REG_SEQ_SCAN_DISABLE DDL_ADC12_REG_SEQ_SCAN_ENABLE_2RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_3RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_4RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_5RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_6RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_7RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_8RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_9RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_10RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_11RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_12RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_13RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_14RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_15RANKS DDL_ADC12_REG_SEQ_SCAN_ENABLE_16RANKS

Return values

None

Definition at line 1050 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_SetSequencerRanks()

__STATIC_INLINE void DDL_ADC12_REG_SetSequencerRanks	(	ADC12_TypeDef *	ADCx,
		uint32_t	Rank,
		uint32_t	Channel )

Set ADC group regular sequence: channel on the selected scan sequence rank.

Note

This function performs configuration of:

• Channels ordering into each rank of scan sequence: whatever channel can be placed into whatever rank.

Parameters

ADCx	ADC instance
Rank	This parameter can be one of the following values: DDL_ADC12_REG_RANK_1 DDL_ADC12_REG_RANK_2 DDL_ADC12_REG_RANK_3 DDL_ADC12_REG_RANK_4 DDL_ADC12_REG_RANK_5 DDL_ADC12_REG_RANK_6 DDL_ADC12_REG_RANK_7 DDL_ADC12_REG_RANK_8 DDL_ADC12_REG_RANK_9 DDL_ADC12_REG_RANK_10 DDL_ADC12_REG_RANK_11 DDL_ADC12_REG_RANK_12 DDL_ADC12_REG_RANK_13 DDL_ADC12_REG_RANK_14 DDL_ADC12_REG_RANK_15 DDL_ADC12_REG_RANK_16
Channel	This parameter can be one of the following values: DDL_ADC12_CHANNEL_0 DDL_ADC12_CHANNEL_1 DDL_ADC12_CHANNEL_2 DDL_ADC12_CHANNEL_3 DDL_ADC12_CHANNEL_4 DDL_ADC12_CHANNEL_5 DDL_ADC12_CHANNEL_6 DDL_ADC12_CHANNEL_7 DDL_ADC12_CHANNEL_8 DDL_ADC12_CHANNEL_9 DDL_ADC12_CHANNEL_10 DDL_ADC12_CHANNEL_11 DDL_ADC12_CHANNEL_12 DDL_ADC12_CHANNEL_13 DDL_ADC12_CHANNEL_14 DDL_ADC12_CHANNEL_15

Return values

None

Definition at line 1198 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_SetTriggerEdge()

__STATIC_INLINE void DDL_ADC12_REG_SetTriggerEdge	(	ADC12_TypeDef *	ADCx,
		uint32_t	ExternalTriggerEdge )

Set ADC group regular conversion trigger polarity.

Note

Applicable only for trigger source set to external trigger.

ADC must be disabled or enabled without conversion on going on group regular.

Parameters

ADCx	ADC instance
ExternalTriggerEdge	This parameter can be one of the following values: DDL_ADC12_REG_TRIG_EXT_RISING DDL_ADC12_REG_TRIG_EXT_DISABLE

Return values

None

Definition at line 980 of file g32r4xx_ddl_adc12.h.

DDL_ADC12_REG_SetTriggerSource()

__STATIC_INLINE void DDL_ADC12_REG_SetTriggerSource	(	ADC12_TypeDef *	ADCx,
		uint32_t	TriggerSource )

Set ADC group regular conversion trigger source: internal (SW start) or from external peripheral (timer event, external interrupt line).

Note

Availability of parameters of trigger sources from timer depends on timers availability on the selected device.

Parameters

ADCx	ADC instance
TriggerSource	This parameter can be one of the following values: DDL_ADC12_REG_TRIG_SOFTWARE DDL_ADC12_REG_TRIG_EXT_TMR1_CC1 DDL_ADC12_REG_TRIG_EXT_TMR1_CC2 DDL_ADC12_REG_TRIG_EXT_TMR1_CC3 DDL_ADC12_REG_TRIG_EXT_TMR2_CC2 DDL_ADC12_REG_TRIG_EXT_TMR3_TRGO DDL_ADC12_REG_TRIG_EXT_TMR4_CC4 DDL_ADC12_REG_TRIG_EXT_EINT_LINE11

Return values

None

Definition at line 929 of file g32r4xx_ddl_adc12.h.