G32R430 Device Driver Layer v1.0.4
G32R4xx Device Driver Layer API Reference
DAC Private Macros

Macros

#define __DAC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__)
 Driver macro reserved for internal use: set a pointer to a register from a register basis from which an offset is applied.
#define IS_DDL_DAC_TRIGGER_SOURCE(__TRIGGER_SOURCE__)
#define IS_DDL_DAC_WAVE_AUTO_GENER_MODE(__WAVE_AUTO_GENERATION_MODE__)
#define IS_DDL_DAC_WAVE_AUTO_GENER_CONFIG(__WAVE_AUTO_GENERATION_MODE__, __WAVE_AUTO_GENERATION_CONFIG__)
#define IS_DDL_DAC_OUTPUT_BUFFER(__OUTPUT_BUFFER__)

Detailed Description

Macro Definition Documentation

◆ __DAC_PTR_REG_OFFSET

#define __DAC_PTR_REG_OFFSET ( __REG__,
__REG_OFFFSET__ )
Value:
((uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2UL))))

Driver macro reserved for internal use: set a pointer to a register from a register basis from which an offset is applied.

Parameters
__REG__Register basis from which the offset is applied.
__REG_OFFFSET__Offset to be applied (unit: number of registers).
Return values
Pointerto register address

Definition at line 242 of file g32r4xx_ddl_dac.h.

◆ IS_DDL_DAC_OUTPUT_BUFFER

#define IS_DDL_DAC_OUTPUT_BUFFER ( __OUTPUT_BUFFER__)
Value:
( ((__OUTPUT_BUFFER__) == DDL_DAC_OUTPUT_BUFFER_INTERNAL) \
|| ((__OUTPUT_BUFFER__) == DDL_DAC_OUTPUT_BUFFER_EXTERNAL) \
)
#define DDL_DAC_OUTPUT_BUFFER_EXTERNAL
#define DDL_DAC_OUTPUT_BUFFER_INTERNAL

Definition at line 120 of file g32r4xx_ddl_dac.c.

◆ IS_DDL_DAC_TRIGGER_SOURCE

#define IS_DDL_DAC_TRIGGER_SOURCE ( __TRIGGER_SOURCE__)
Value:
( ((__TRIGGER_SOURCE__) == DDL_DAC_CHANNEL_TRIG_SOURCE_SOFTWARE ) \
|| ((__TRIGGER_SOURCE__) == DDL_DAC_CHANNEL_TRIG_SOURCE_TMR1) \
|| ((__TRIGGER_SOURCE__) == DDL_DAC_CHANNEL_TRIG_SOURCE_TMR2) \
|| ((__TRIGGER_SOURCE__) == DDL_DAC_CHANNEL_TRIG_SOURCE_TMR3) \
|| ((__TRIGGER_SOURCE__) == DDL_DAC_CHANNEL_TRIG_SOURCE_TMR4) \
|| ((__TRIGGER_SOURCE__) == DDL_DAC_CHANNEL_TRIG_SOURCE_EINT_LINE0) \
|| ((__TRIGGER_SOURCE__) == DDL_DAC_CHANNEL_TRIG_SOURCE_EINT_LINE2) \
|| ((__TRIGGER_SOURCE__) == DDL_DAC_CHANNEL_TRIG_SOURCE_EINT_LINE11) \
)
#define DDL_DAC_CHANNEL_TRIG_SOURCE_EINT_LINE11
#define DDL_DAC_CHANNEL_TRIG_SOURCE_TMR2
#define DDL_DAC_CHANNEL_TRIG_SOURCE_EINT_LINE2
#define DDL_DAC_CHANNEL_TRIG_SOURCE_EINT_LINE0
#define DDL_DAC_CHANNEL_TRIG_SOURCE_TMR4
#define DDL_DAC_CHANNEL_TRIG_SOURCE_TMR1
#define DDL_DAC_CHANNEL_TRIG_SOURCE_TMR3
#define DDL_DAC_CHANNEL_TRIG_SOURCE_SOFTWARE

Definition at line 75 of file g32r4xx_ddl_dac.c.

◆ IS_DDL_DAC_WAVE_AUTO_GENER_CONFIG

#define IS_DDL_DAC_WAVE_AUTO_GENER_CONFIG ( __WAVE_AUTO_GENERATION_MODE__,
__WAVE_AUTO_GENERATION_CONFIG__ )
Value:
( (((__WAVE_AUTO_GENERATION_MODE__) == DDL_DAC_WAVE_GENERATE_NOISE) \
&& ( ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_NONE_MASK_LFSR_0_0) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_NONE_MASK_LFSR_1_0) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_NONE_MASK_LFSR_2_0) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_NONE_MASK_LFSR_3_0) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_NONE_MASK_LFSR_4_0) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_NONE_MASK_LFSR_5_0) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_NONE_MASK_LFSR_6_0) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_NONE_MASK_LFSR_7_0) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_NONE_MASK_LFSR_8_0) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_NONE_MASK_LFSR_9_0)) \
) \
||(((__WAVE_AUTO_GENERATION_MODE__) == DDL_DAC_WAVE_GENERATE_TRIANGLE) \
&& ( ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_TRI_WAVE_AMPLITUDE_1) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_TRI_WAVE_AMPLITUDE_3) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_TRI_WAVE_AMPLITUDE_7) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_TRI_WAVE_AMPLITUDE_15) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_TRI_WAVE_AMPLITUDE_31) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_TRI_WAVE_AMPLITUDE_63) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_TRI_WAVE_AMPLITUDE_127) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_TRI_WAVE_AMPLITUDE_255) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_TRI_WAVE_AMPLITUDE_511) \
|| ((__WAVE_AUTO_GENERATION_CONFIG__) == DDL_DAC_TRI_WAVE_AMPLITUDE_1023)) \
) \
)
#define DDL_DAC_NONE_MASK_LFSR_4_0
#define DDL_DAC_NONE_MASK_LFSR_5_0
#define DDL_DAC_NONE_MASK_LFSR_3_0
#define DDL_DAC_NONE_MASK_LFSR_2_0
#define DDL_DAC_NONE_MASK_LFSR_9_0
#define DDL_DAC_NONE_MASK_LFSR_7_0
#define DDL_DAC_NONE_MASK_LFSR_8_0
#define DDL_DAC_NONE_MASK_LFSR_0_0
#define DDL_DAC_NONE_MASK_LFSR_6_0
#define DDL_DAC_NONE_MASK_LFSR_1_0
#define DDL_DAC_TRI_WAVE_AMPLITUDE_127
#define DDL_DAC_TRI_WAVE_AMPLITUDE_1
#define DDL_DAC_TRI_WAVE_AMPLITUDE_63
#define DDL_DAC_TRI_WAVE_AMPLITUDE_3
#define DDL_DAC_TRI_WAVE_AMPLITUDE_7
#define DDL_DAC_TRI_WAVE_AMPLITUDE_31
#define DDL_DAC_TRI_WAVE_AMPLITUDE_511
#define DDL_DAC_TRI_WAVE_AMPLITUDE_255
#define DDL_DAC_TRI_WAVE_AMPLITUDE_15
#define DDL_DAC_TRI_WAVE_AMPLITUDE_1023
#define DDL_DAC_WAVE_GENERATE_TRIANGLE
#define DDL_DAC_WAVE_GENERATE_NOISE

Definition at line 93 of file g32r4xx_ddl_dac.c.

◆ IS_DDL_DAC_WAVE_AUTO_GENER_MODE

#define IS_DDL_DAC_WAVE_AUTO_GENER_MODE ( __WAVE_AUTO_GENERATION_MODE__)
Value:
( ((__WAVE_AUTO_GENERATION_MODE__) == DDL_DAC_WAVE_GENERATE_NONE) \
|| ((__WAVE_AUTO_GENERATION_MODE__) == DDL_DAC_WAVE_GENERATE_NOISE) \
|| ((__WAVE_AUTO_GENERATION_MODE__) == DDL_DAC_WAVE_GENERATE_TRIANGLE) \
|| ((__WAVE_AUTO_GENERATION_MODE__) == DDL_DAC_WAVE_GENERATE_SAWTOOTH) \
)
#define DDL_DAC_WAVE_GENERATE_SAWTOOTH
#define DDL_DAC_WAVE_GENERATE_NONE

Definition at line 86 of file g32r4xx_ddl_dac.c.