MBURST

Macros
#define	DDL_DMA_MBURST_SINGLE   0x00000000U
#define	DDL_DMA_MBURST_INC4   DMA_SCFG_MBCFG_0
#define	DDL_DMA_MBURST_INC8   DMA_SCFG_MBCFG_1
#define	DDL_DMA_MBURST_INC16   (DMA_SCFG_MBCFG_0 | DMA_SCFG_MBCFG_1)

Detailed Description

Macro Definition Documentation

DDL_DMA_MBURST_INC16

#define DDL_DMA_MBURST_INC16   (DMA_SCFG_MBCFG_0 | DMA_SCFG_MBCFG_1)

Memory burst of 16 beats transfer configuration

Definition at line 331 of file g32r4xx_ddl_dma.h.

DDL_DMA_MBURST_INC4

#define DDL_DMA_MBURST_INC4   DMA_SCFG_MBCFG_0

Memory burst of 4 beats transfer configuration

Definition at line 329 of file g32r4xx_ddl_dma.h.

DDL_DMA_MBURST_INC8

#define DDL_DMA_MBURST_INC8   DMA_SCFG_MBCFG_1

Memory burst of 8 beats transfer configuration

Definition at line 330 of file g32r4xx_ddl_dma.h.

DDL_DMA_MBURST_SINGLE

#define DDL_DMA_MBURST_SINGLE   0x00000000U

Memory burst single transfer configuration

Definition at line 328 of file g32r4xx_ddl_dma.h.