PBURST

Macros
#define	DDL_DMA_PBURST_SINGLE   0x00000000U
#define	DDL_DMA_PBURST_INC4   DMA_SCFG_PBCFG_0
#define	DDL_DMA_PBURST_INC8   DMA_SCFG_PBCFG_1
#define	DDL_DMA_PBURST_INC16   (DMA_SCFG_PBCFG_0 | DMA_SCFG_PBCFG_1)

Detailed Description

Macro Definition Documentation

DDL_DMA_PBURST_INC16

#define DDL_DMA_PBURST_INC16   (DMA_SCFG_PBCFG_0 | DMA_SCFG_PBCFG_1)

Peripheral burst of 16 beats transfer configuration

Definition at line 342 of file g32r4xx_ddl_dma.h.

DDL_DMA_PBURST_INC4

#define DDL_DMA_PBURST_INC4   DMA_SCFG_PBCFG_0

Peripheral burst of 4 beats transfer configuration

Definition at line 340 of file g32r4xx_ddl_dma.h.

DDL_DMA_PBURST_INC8

#define DDL_DMA_PBURST_INC8   DMA_SCFG_PBCFG_1

Peripheral burst of 8 beats transfer configuration

Definition at line 341 of file g32r4xx_ddl_dma.h.

DDL_DMA_PBURST_SINGLE

#define DDL_DMA_PBURST_SINGLE   0x00000000U

Peripheral burst single transfer configuration

Definition at line 339 of file g32r4xx_ddl_dma.h.