((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)
DDL_DMA_STREAM_0))) ? DMA1_Stream0 : \
(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)
DDL_DMA_STREAM_1))) ? DMA1_Stream1 : \
(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)
DDL_DMA_STREAM_2))) ? DMA1_Stream2 : \
(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)
DDL_DMA_STREAM_3))) ? DMA1_Stream3 : \
(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)
DDL_DMA_STREAM_4))) ? DMA1_Stream4 : \
(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)
DDL_DMA_STREAM_5))) ? DMA1_Stream5 : \
(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)
DDL_DMA_STREAM_6))) ? DMA1_Stream6 : \
(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)
DDL_DMA_STREAM_7))) ? DMA1_Stream7 : \
0)
Convert DMA Instance DMAx and DDL_DMA_STREAM_y into DMAx_Streamy.