DMA_DDL_Private_Macros

Macros
#define	IS_DDL_DMA_DIRECTION(__VALUE__)
#define	IS_DDL_DMA_MODE(__VALUE__)
#define	IS_DDL_DMA_PERIPHINCMODE(__VALUE__)
#define	IS_DDL_DMA_MEMORYINCMODE(__VALUE__)
#define	IS_DDL_DMA_PERIPHDATASIZE(__VALUE__)
#define	IS_DDL_DMA_MEMORYDATASIZE(__VALUE__)
#define	IS_DDL_DMA_NBDATA(__VALUE__)
#define	IS_DDL_DMA_CHANNEL(__VALUE__)
#define	IS_DDL_DMA_PRIORITY(__VALUE__)
#define	IS_DDL_DMA_ALL_STREAM_INSTANCE(INSTANCE, STREAM)
#define	IS_DDL_DMA_FIFO_MODE_STATE(STATE)
#define	IS_DDL_DMA_FIFO_THRESHOLD(THRESHOLD)
#define	IS_DDL_DMA_MEMORY_BURST(BURST)
#define	IS_DDL_DMA_PERIPHERAL_BURST(BURST)

Detailed Description

Macro Definition Documentation

IS_DDL_DMA_ALL_STREAM_INSTANCE

#define IS_DDL_DMA_ALL_STREAM_INSTANCE	(		INSTANCE,
			STREAM )

Value:

((((INSTANCE) == DMA1) && \
(((STREAM) == DDL_DMA_STREAM_0) || \
 ((STREAM) == DDL_DMA_STREAM_1) || \
 ((STREAM) == DDL_DMA_STREAM_2) || \
 ((STREAM) == DDL_DMA_STREAM_3) || \
 ((STREAM) == DDL_DMA_STREAM_4) || \
 ((STREAM) == DDL_DMA_STREAM_5) || \
 ((STREAM) == DDL_DMA_STREAM_6) || \
 ((STREAM) == DDL_DMA_STREAM_7) || \
 ((STREAM) == DDL_DMA_STREAM_ALL))))

Definition at line 109 of file g32r4xx_ddl_dma.c.

IS_DDL_DMA_CHANNEL

#define IS_DDL_DMA_CHANNEL

(

__VALUE__

)

Value:

(((__VALUE__) == DDL_DMA_CHANNEL_0)  || \
((__VALUE__) == DDL_DMA_CHANNEL_1)  || \
((__VALUE__) == DDL_DMA_CHANNEL_2)  || \
((__VALUE__) == DDL_DMA_CHANNEL_3)  || \
((__VALUE__) == DDL_DMA_CHANNEL_4)  || \
((__VALUE__) == DDL_DMA_CHANNEL_5)  || \
((__VALUE__) == DDL_DMA_CHANNEL_6)  || \
((__VALUE__) == DDL_DMA_CHANNEL_7))

Definition at line 95 of file g32r4xx_ddl_dma.c.

IS_DDL_DMA_DIRECTION

#define IS_DDL_DMA_DIRECTION

(

__VALUE__

)

Value:

(((__VALUE__) == DDL_DMA_DIRECTION_PERIPH_TO_MEMORY) || \
((__VALUE__) == DDL_DMA_DIRECTION_MEMORY_TO_PERIPH) || \
((__VALUE__) == DDL_DMA_DIRECTION_MEMORY_TO_MEMORY))

Definition at line 71 of file g32r4xx_ddl_dma.c.

IS_DDL_DMA_FIFO_MODE_STATE

#define IS_DDL_DMA_FIFO_MODE_STATE

(

STATE

)

Value:

(((STATE) == DDL_DMA_FIFOMODE_DISABLE ) || \
((STATE) == DDL_DMA_FIFOMODE_ENABLE))

Definition at line 120 of file g32r4xx_ddl_dma.c.

IS_DDL_DMA_FIFO_THRESHOLD

#define IS_DDL_DMA_FIFO_THRESHOLD

(

THRESHOLD

)

Value:

(((THRESHOLD) == DDL_DMA_FIFOTHRESHOLD_1_4) || \
((THRESHOLD) == DDL_DMA_FIFOTHRESHOLD_1_2)  || \
((THRESHOLD) == DDL_DMA_FIFOTHRESHOLD_3_4)  || \
((THRESHOLD) == DDL_DMA_FIFOTHRESHOLD_FULL))

Definition at line 123 of file g32r4xx_ddl_dma.c.

IS_DDL_DMA_MEMORY_BURST

#define IS_DDL_DMA_MEMORY_BURST

(

BURST

)

Value:

(((BURST) == DDL_DMA_MBURST_SINGLE) || \
((BURST) == DDL_DMA_MBURST_INC4)   || \
((BURST) == DDL_DMA_MBURST_INC8)   || \
((BURST) == DDL_DMA_MBURST_INC16))

Definition at line 128 of file g32r4xx_ddl_dma.c.

IS_DDL_DMA_MEMORYDATASIZE

#define IS_DDL_DMA_MEMORYDATASIZE

(

__VALUE__

)

Value:

(((__VALUE__) == DDL_DMA_MDATAALIGN_BYTE)      || \
((__VALUE__) == DDL_DMA_MDATAALIGN_HALFWORD)  || \
((__VALUE__) == DDL_DMA_MDATAALIGN_WORD))

Definition at line 89 of file g32r4xx_ddl_dma.c.

IS_DDL_DMA_MEMORYINCMODE

#define IS_DDL_DMA_MEMORYINCMODE

(

__VALUE__

)

Value:

(((__VALUE__) == DDL_DMA_MEMORY_INCREMENT) || \
((__VALUE__) == DDL_DMA_MEMORY_NOINCREMENT))

Definition at line 82 of file g32r4xx_ddl_dma.c.

IS_DDL_DMA_MODE

#define IS_DDL_DMA_MODE

(

__VALUE__

)

Value:

(((__VALUE__) == DDL_DMA_MODE_NORMAL)    || \
((__VALUE__) == DDL_DMA_MODE_CIRCULAR)  || \
((__VALUE__) == DDL_DMA_MODE_PFCTRL))

Definition at line 75 of file g32r4xx_ddl_dma.c.

IS_DDL_DMA_NBDATA

#define IS_DDL_DMA_NBDATA

(

__VALUE__

)

Value:

((__VALUE__)  <= 0x0000FFFFU)

Definition at line 93 of file g32r4xx_ddl_dma.c.

IS_DDL_DMA_PERIPHDATASIZE

#define IS_DDL_DMA_PERIPHDATASIZE

(

__VALUE__

)

Value:

(((__VALUE__) == DDL_DMA_PDATAALIGN_BYTE)      || \
((__VALUE__) == DDL_DMA_PDATAALIGN_HALFWORD)  || \
((__VALUE__) == DDL_DMA_PDATAALIGN_WORD))

Definition at line 85 of file g32r4xx_ddl_dma.c.

IS_DDL_DMA_PERIPHERAL_BURST

#define IS_DDL_DMA_PERIPHERAL_BURST

(

BURST

)

Value:

(((BURST) == DDL_DMA_PBURST_SINGLE) || \
((BURST) == DDL_DMA_PBURST_INC4)   || \
((BURST) == DDL_DMA_PBURST_INC8)   || \
((BURST) == DDL_DMA_PBURST_INC16))

Definition at line 133 of file g32r4xx_ddl_dma.c.

IS_DDL_DMA_PERIPHINCMODE

#define IS_DDL_DMA_PERIPHINCMODE

(

__VALUE__

)

Value:

(((__VALUE__) == DDL_DMA_PERIPH_INCREMENT) || \
((__VALUE__) == DDL_DMA_PERIPH_NOINCREMENT))

Definition at line 79 of file g32r4xx_ddl_dma.c.

IS_DDL_DMA_PRIORITY

#define IS_DDL_DMA_PRIORITY

(

__VALUE__

)

Value:

(((__VALUE__) == DDL_DMA_PRIORITY_LOW)    || \
((__VALUE__) == DDL_DMA_PRIORITY_MEDIUM) || \
((__VALUE__) == DDL_DMA_PRIORITY_HIGH)   || \
((__VALUE__) == DDL_DMA_PRIORITY_VERYHIGH))

Definition at line 104 of file g32r4xx_ddl_dma.c.