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G32R430 Device Driver Layer v1.0.4
G32R4xx Device Driver Layer API Reference
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Macros | |
| #define | DDL_RCM_AHB_DIV_1 (RCM_SCCR_HDIV_0) |
| #define | DDL_RCM_AHB_DIV_2 (RCM_SCCR_HDIV_3) |
| #define | DDL_RCM_AHB_DIV_4 (RCM_SCCR_HDIV_3 | RCM_SCCR_HDIV_0) |
| #define | DDL_RCM_AHB_DIV_8 (RCM_SCCR_HDIV_3 | RCM_SCCR_HDIV_1) |
| #define | DDL_RCM_AHB_DIV_16 (RCM_SCCR_HDIV_3 | RCM_SCCR_HDIV_1 | RCM_SCCR_HDIV_0) |
| #define | DDL_RCM_AHB_DIV_32 (RCM_SCCR_HDIV_3 | RCM_SCCR_HDIV_2) |
| #define | DDL_RCM_AHB_DIV_64 (RCM_SCCR_HDIV_3 | RCM_SCCR_HDIV_2 | RCM_SCCR_HDIV_0) |
| #define | DDL_RCM_AHB_DIV_128 (RCM_SCCR_HDIV_3 | RCM_SCCR_HDIV_2 | RCM_SCCR_HDIV_1) |
| #define | DDL_RCM_AHB_DIV_256 (RCM_SCCR_HDIV) |
| #define DDL_RCM_AHB_DIV_1 (RCM_SCCR_HDIV_0) |
SYSCLK not divided
Definition at line 186 of file g32r4xx_ddl_rcm.h.
| #define DDL_RCM_AHB_DIV_128 (RCM_SCCR_HDIV_3 | RCM_SCCR_HDIV_2 | RCM_SCCR_HDIV_1) |
SYSCLK divided by 128
Definition at line 193 of file g32r4xx_ddl_rcm.h.
| #define DDL_RCM_AHB_DIV_16 (RCM_SCCR_HDIV_3 | RCM_SCCR_HDIV_1 | RCM_SCCR_HDIV_0) |
SYSCLK divided by 16
Definition at line 190 of file g32r4xx_ddl_rcm.h.
| #define DDL_RCM_AHB_DIV_2 (RCM_SCCR_HDIV_3) |
SYSCLK divided by 2
Definition at line 187 of file g32r4xx_ddl_rcm.h.
| #define DDL_RCM_AHB_DIV_256 (RCM_SCCR_HDIV) |
SYSCLK divided by 256
Definition at line 194 of file g32r4xx_ddl_rcm.h.
| #define DDL_RCM_AHB_DIV_32 (RCM_SCCR_HDIV_3 | RCM_SCCR_HDIV_2) |
SYSCLK divided by 32
Definition at line 191 of file g32r4xx_ddl_rcm.h.
| #define DDL_RCM_AHB_DIV_4 (RCM_SCCR_HDIV_3 | RCM_SCCR_HDIV_0) |
SYSCLK divided by 4
Definition at line 188 of file g32r4xx_ddl_rcm.h.
| #define DDL_RCM_AHB_DIV_64 (RCM_SCCR_HDIV_3 | RCM_SCCR_HDIV_2 | RCM_SCCR_HDIV_0) |
SYSCLK divided by 64
Definition at line 192 of file g32r4xx_ddl_rcm.h.
| #define DDL_RCM_AHB_DIV_8 (RCM_SCCR_HDIV_3 | RCM_SCCR_HDIV_1) |
SYSCLK divided by 8
Definition at line 189 of file g32r4xx_ddl_rcm.h.