G32R430 Device Driver Layer v1.0.4
G32R4xx Device Driver Layer API Reference
Calculate frequencies

Macros

#define __DDL_RCM_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLP__, __PLLMUL__)
 Helper macro to calculate the PLLCLK frequency on system domain.
#define __DDL_RCM_CALC_HCLK_FREQ(__SYSCLKFREQ__, __AHBPRESCALER__)
 Helper macro to calculate the HCLK frequency.
#define __DDL_RCM_CALC_PCLK_FREQ(__HCLKFREQ__, __APBPRESCALER__)
 Helper macro to calculate the PCLK frequency (ABP).
#define __DDL_RCM_KEY   0x87E4
#define IS_DDL_RCM_LSE_DRIVE(__VALUE__)

Detailed Description

Macro Definition Documentation

◆ __DDL_RCM_CALC_HCLK_FREQ

#define __DDL_RCM_CALC_HCLK_FREQ ( __SYSCLKFREQ__,
__AHBPRESCALER__ )
Value:
((__SYSCLKFREQ__) >> AHBPrescTable[((__AHBPRESCALER__) & RCM_SCCR_HDIV) >> RCM_SCCR_HDIV_Pos])
const uint8_t AHBPrescTable[16]

Helper macro to calculate the HCLK frequency.

Parameters
__SYSCLKFREQ__SYSCLK frequency (based on HSE/HSI/PLLCLK)
__AHBPRESCALER__This parameter can be one of the following values:
Return values
HCLKclock frequency (in Hz)

Definition at line 470 of file g32r4xx_ddl_rcm.h.

◆ __DDL_RCM_CALC_PCLK_FREQ

#define __DDL_RCM_CALC_PCLK_FREQ ( __HCLKFREQ__,
__APBPRESCALER__ )
Value:
((__HCLKFREQ__) >> APBPrescTable[(__APBPRESCALER__) >> RCM_SCCR_PDIV_Pos])
const uint8_t APBPrescTable[8]

Helper macro to calculate the PCLK frequency (ABP).

Parameters
__HCLKFREQ__HCLK frequency
__APBPRESCALER__This parameter can be one of the following values:
Return values
PCLK1clock frequency (in Hz)

Definition at line 483 of file g32r4xx_ddl_rcm.h.

◆ __DDL_RCM_CALC_PLLCLK_FREQ

#define __DDL_RCM_CALC_PLLCLK_FREQ ( __INPUTFREQ__,
__PLLP__,
__PLLMUL__ )
Value:
(((__INPUTFREQ__) / (__PLLP__)) * (__PLLMUL__))

Helper macro to calculate the PLLCLK frequency on system domain.

Note
ex: __DDL_RCM_CALC_PLLCLK_FREQ (HSE_VALUE,DDL_RCM_PLL_GetHSEFreqPrescaler (), DDL_RCM_PLL_GetN (), DDL_RCM_PLL_GetP ());
Parameters
__INPUTFREQ__PLL Input frequency (based on HSE/HSI)
__PLLP__This parameter can be between 0x1 to 0xF
__PLLMUL__This parameter can be between 0x0 to 0x3F
Return values
PLLclock frequency (in Hz)

Definition at line 453 of file g32r4xx_ddl_rcm.h.

◆ __DDL_RCM_KEY

#define __DDL_RCM_KEY   0x87E4

Definition at line 485 of file g32r4xx_ddl_rcm.h.

◆ IS_DDL_RCM_LSE_DRIVE

#define IS_DDL_RCM_LSE_DRIVE ( __VALUE__)
Value:
(((__VALUE__) == DDL_RCM_LSE_DRIVE_LOW) \
|| ((__VALUE__) == DDL_RCM_LSE_DRIVE_HIGH))
#define DDL_RCM_LSE_DRIVE_HIGH
#define DDL_RCM_LSE_DRIVE_LOW

Definition at line 487 of file g32r4xx_ddl_rcm.h.