G32R430 Device Driver Layer v1.0.4
G32R4xx Device Driver Layer API Reference
SPI Private Macros

Macros

#define IS_DDL_SPI_TRANSFER_DIRECTION(__VALUE__)
#define IS_DDL_SPI_MODE(__VALUE__)
#define IS_DDL_SPI_DATAWIDTH(__VALUE__)
#define IS_DDL_SPI_POLARITY(__VALUE__)
#define IS_DDL_SPI_PHASE(__VALUE__)
#define IS_DDL_SPI_NSS(__VALUE__)
#define IS_DDL_SPI_BAUDRATE(__VALUE__)
#define IS_DDL_SPI_BITORDER(__VALUE__)
#define IS_DDL_SPI_CRCCALCULATION(__VALUE__)
#define IS_DDL_SPI_CRC_POLYNOMIAL(__VALUE__)

Detailed Description

Macro Definition Documentation

◆ IS_DDL_SPI_BAUDRATE

#define IS_DDL_SPI_BAUDRATE ( __VALUE__)
Value:
(((__VALUE__) == DDL_SPI_BAUDRATEPRESCALER_DIV2) \
|| ((__VALUE__) == DDL_SPI_BAUDRATEPRESCALER_DIV4) \
|| ((__VALUE__) == DDL_SPI_BAUDRATEPRESCALER_DIV8) \
|| ((__VALUE__) == DDL_SPI_BAUDRATEPRESCALER_DIV16) \
|| ((__VALUE__) == DDL_SPI_BAUDRATEPRESCALER_DIV32) \
|| ((__VALUE__) == DDL_SPI_BAUDRATEPRESCALER_DIV64) \
|| ((__VALUE__) == DDL_SPI_BAUDRATEPRESCALER_DIV128) \
#define DDL_SPI_BAUDRATEPRESCALER_DIV32
#define DDL_SPI_BAUDRATEPRESCALER_DIV128
#define DDL_SPI_BAUDRATEPRESCALER_DIV256
#define DDL_SPI_BAUDRATEPRESCALER_DIV16
#define DDL_SPI_BAUDRATEPRESCALER_DIV8
#define DDL_SPI_BAUDRATEPRESCALER_DIV64
#define DDL_SPI_BAUDRATEPRESCALER_DIV2
#define DDL_SPI_BAUDRATEPRESCALER_DIV4

Definition at line 105 of file g32r4xx_ddl_spi.c.

◆ IS_DDL_SPI_BITORDER

#define IS_DDL_SPI_BITORDER ( __VALUE__)
Value:
(((__VALUE__) == DDL_SPI_LSB_FIRST) \
|| ((__VALUE__) == DDL_SPI_MSB_FIRST))
#define DDL_SPI_MSB_FIRST
#define DDL_SPI_LSB_FIRST

Definition at line 114 of file g32r4xx_ddl_spi.c.

◆ IS_DDL_SPI_CRC_POLYNOMIAL

#define IS_DDL_SPI_CRC_POLYNOMIAL ( __VALUE__)
Value:
((__VALUE__) >= 0x1U)

Definition at line 120 of file g32r4xx_ddl_spi.c.

◆ IS_DDL_SPI_CRCCALCULATION

#define IS_DDL_SPI_CRCCALCULATION ( __VALUE__)
Value:
(((__VALUE__) == DDL_SPI_CRCCALCULATION_ENABLE) \
|| ((__VALUE__) == DDL_SPI_CRCCALCULATION_DISABLE))
#define DDL_SPI_CRCCALCULATION_ENABLE
#define DDL_SPI_CRCCALCULATION_DISABLE

Definition at line 117 of file g32r4xx_ddl_spi.c.

◆ IS_DDL_SPI_DATAWIDTH

#define IS_DDL_SPI_DATAWIDTH ( __VALUE__)
Value:
(((__VALUE__) == DDL_SPI_DATAWIDTH_8BIT) \
|| ((__VALUE__) == DDL_SPI_DATAWIDTH_16BIT))
#define DDL_SPI_DATAWIDTH_16BIT
#define DDL_SPI_DATAWIDTH_8BIT

Definition at line 92 of file g32r4xx_ddl_spi.c.

◆ IS_DDL_SPI_MODE

#define IS_DDL_SPI_MODE ( __VALUE__)
Value:
(((__VALUE__) == DDL_SPI_MODE_MASTER) \
|| ((__VALUE__) == DDL_SPI_MODE_SLAVE))
#define DDL_SPI_MODE_SLAVE
#define DDL_SPI_MODE_MASTER

Definition at line 89 of file g32r4xx_ddl_spi.c.

◆ IS_DDL_SPI_NSS

#define IS_DDL_SPI_NSS ( __VALUE__)
Value:
(((__VALUE__) == DDL_SPI_NSS_SOFT) \
|| ((__VALUE__) == DDL_SPI_NSS_HARD_INPUT) \
|| ((__VALUE__) == DDL_SPI_NSS_HARD_OUTPUT))
#define DDL_SPI_NSS_HARD_OUTPUT
#define DDL_SPI_NSS_HARD_INPUT
#define DDL_SPI_NSS_SOFT

Definition at line 101 of file g32r4xx_ddl_spi.c.

◆ IS_DDL_SPI_PHASE

#define IS_DDL_SPI_PHASE ( __VALUE__)
Value:
(((__VALUE__) == DDL_SPI_PHASE_1EDGE) \
|| ((__VALUE__) == DDL_SPI_PHASE_2EDGE))
#define DDL_SPI_PHASE_2EDGE
#define DDL_SPI_PHASE_1EDGE

Definition at line 98 of file g32r4xx_ddl_spi.c.

◆ IS_DDL_SPI_POLARITY

#define IS_DDL_SPI_POLARITY ( __VALUE__)
Value:
(((__VALUE__) == DDL_SPI_POLARITY_LOW) \
|| ((__VALUE__) == DDL_SPI_POLARITY_HIGH))
#define DDL_SPI_POLARITY_LOW
#define DDL_SPI_POLARITY_HIGH

Definition at line 95 of file g32r4xx_ddl_spi.c.

◆ IS_DDL_SPI_TRANSFER_DIRECTION

#define IS_DDL_SPI_TRANSFER_DIRECTION ( __VALUE__)
Value:
(((__VALUE__) == DDL_SPI_FULL_DUPLEX) \
|| ((__VALUE__) == DDL_SPI_SIMPLEX_RX) \
|| ((__VALUE__) == DDL_SPI_HALF_DUPLEX_RX) \
|| ((__VALUE__) == DDL_SPI_HALF_DUPLEX_TX))
#define DDL_SPI_FULL_DUPLEX
#define DDL_SPI_HALF_DUPLEX_RX
#define DDL_SPI_HALF_DUPLEX_TX
#define DDL_SPI_SIMPLEX_RX

Definition at line 84 of file g32r4xx_ddl_spi.c.