Structure definition of some features of ADC group regular. More...

#include <g32r4xx_ddl_adc16.h>

Data Fields
uint32_t	TriggerSource
uint32_t	SequencerLength
uint32_t	SequencerDiscont
uint32_t	ContinuousMode
uint32_t	DMATransfer
uint32_t	Overrun

Detailed Description

Structure definition of some features of ADC group regular.

Note: These parameters have an impact on ADC scope: ADC group regular. Refer to corresponding unitary functions into Configuration of ADC hierarchical scope: group regular (functions with prefix "REG").; The setting of these parameters by function DDL_ADC16_REG_Init() is conditioned to ADC state: ADC instance must be disabled. This condition is applied to all ADC features, for efficiency and compatibility over all G32R4 families. However, the different features can be set under different ADC state conditions (setting possible with ADC enabled without conversion on going, ADC enabled with conversion on going, ...) Each feature can be updated afterwards with a unitary function and potentially with ADC in a different state than disabled, refer to description of each function for setting conditioned to ADC state.

Definition at line 497 of file g32r4xx_ddl_adc16.h.

Field Documentation

◆ ContinuousMode

uint32_t DDL_ADC16_REG_InitTypeDef::ContinuousMode

Set ADC continuous conversion mode on ADC group regular, whether ADC conversions are performed in single mode (one conversion per trigger) or in continuous mode (after the first trigger, following conversions launched successively automatically).

Definition at line 505 of file g32r4xx_ddl_adc16.h.

◆ DMATransfer

uint32_t DDL_ADC16_REG_InitTypeDef::DMATransfer

Set ADC group regular conversion data transfer: no transfer or transfer by DMA, and DMA requests mode.

Definition at line 507 of file g32r4xx_ddl_adc16.h.

◆ Overrun

uint32_t DDL_ADC16_REG_InitTypeDef::Overrun

Set ADC group regular behavior

Definition at line 509 of file g32r4xx_ddl_adc16.h.

◆ SequencerDiscont

uint32_t DDL_ADC16_REG_InitTypeDef::SequencerDiscont

Set ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.

Definition at line 503 of file g32r4xx_ddl_adc16.h.

◆ SequencerLength

uint32_t DDL_ADC16_REG_InitTypeDef::SequencerLength

Set ADC group regular sequencer length.

Definition at line 501 of file g32r4xx_ddl_adc16.h.

◆ TriggerSource

uint32_t DDL_ADC16_REG_InitTypeDef::TriggerSource

Set ADC group regular conversion trigger source: internal (SW start) or from external peripheral (timer event, external interrupt line).

Definition at line 499 of file g32r4xx_ddl_adc16.h.

The documentation for this struct was generated from the following file:

Include/g32r4xx_ddl_adc16.h

Data Fields