TMR Time Base configuration structure definition. More...

#include <g32r4xx_ddl_tmr.h>

Data Fields
uint16_t	Prescaler
uint32_t	CounterMode
uint32_t	Autoreload
uint32_t	ClockDivision
uint32_t	RepetitionCounter

Detailed Description

TMR Time Base configuration structure definition.

Definition at line 194 of file g32r4xx_ddl_tmr.h.

Field Documentation

◆ Autoreload

uint32_t DDL_TMR_InitTypeDef::Autoreload

Specifies the auto reload value to be loaded into the active Auto-Reload Register at the next update event. This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF. Some timer instances may support 32 bits counters. In that case this parameter must be a number between 0x0000 and 0xFFFFFFFF.

This feature can be modified afterwards using unitary function DDL_TMR_SetAutoReload().

Definition at line 208 of file g32r4xx_ddl_tmr.h.

◆ ClockDivision

uint32_t DDL_TMR_InitTypeDef::ClockDivision

Specifies the clock division. This parameter can be a value of Clock Division.

This feature can be modified afterwards using unitary function DDL_TMR_SetClockDivision().

Definition at line 217 of file g32r4xx_ddl_tmr.h.

◆ CounterMode

uint32_t DDL_TMR_InitTypeDef::CounterMode

Specifies the counter mode. This parameter can be a value of Counter Mode.

This feature can be modified afterwards using unitary function DDL_TMR_SetCounterMode().

Definition at line 202 of file g32r4xx_ddl_tmr.h.

◆ Prescaler

uint16_t DDL_TMR_InitTypeDef::Prescaler

Specifies the prescaler value used to divide the TMR clock. This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF.

This feature can be modified afterwards using unitary function DDL_TMR_SetPrescaler().

Definition at line 196 of file g32r4xx_ddl_tmr.h.

◆ RepetitionCounter

uint32_t DDL_TMR_InitTypeDef::RepetitionCounter

Specifies the repetition counter value. Each time the REPCNT downcounter reaches zero, an update event is generated and counting restarts from the REPCNT value (N). This means in PWM mode that (N+1) corresponds to:

the number of PWM periods in edge-aligned mode
the number of half PWM period in center-aligned mode GP timers: this parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. Advanced timers: this parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.

This feature can be modified afterwards using unitary function DDL_TMR_SetRepetitionCounter().

Definition at line 223 of file g32r4xx_ddl_tmr.h.

The documentation for this struct was generated from the following file:

Include/g32r4xx_ddl_tmr.h