GS400
Product Overview
Dachuan GS400 is based on the domestic dual-core security encryption architecture, using the international advanced and domestic leading embedded SOC-eSE security unit technology, while supporting the autonomous processor customization technology and multi-scene ultra-low-power technology, for the core and critical nodes of the industrial Internet, can provide low power consumption, high security embedded application solutions.
Structure Diagram
Performance
System Architecture
- Based on the CK810 and CK803S cores
- CK810 maximum operating frequency 600MHz
- CK803S maximum operating frequency 200MHz
Memory
- SRAM 256KB
- OTP 1KB
- SDR-SDRAM 32MB
Clock
- System clock: 1 x 24M crystal via clock generator clock generator for each SOC module Multiple clocks
Reset,Power management
- Power On Reset (POR)
- General purpose GPIO power supply: 2.97~3.63V
- Kernel system power supply: 0.99V~1.21V
Interrupt
- Supports 64 interrupt resources
DMA
- 2 DMA modules with 8 channels each
MailBox
- 2 MailBoxes are available in CK810 and CK803S
- Dual core communication support
Security
- Supports 256-bit AES 192-bit 3DES
- SM2, SM4
- SHA Family
- ECC
I/Os
- Two sets of GPIOs of 32 ports each, all IOs can be mapped to interrupts
Timer
- 1 system timer
- 1 high resolution timer
- Both support free running and user defined modes Modes
Peripherals
- 3 UARTs
- 2 SPI, supporting direct data transfer to external SPI-Flash via DMA interface
- 3 I2C with support for 3 speed modes up to 3.4Mb/s
- 1 USB2.0, works as USB host Machine and USB device
SDIO
- Support for DMA
- Support for UHS50/UHS104 cards
- Support for configuring SD bus mode
PWM
- 2 x XPWMA and 1 x stepper motor controller
ADC
- 1 low power, high speed, successive approximation type ADC that supports an advanced 1.0MSPS maximum sampling frequency and 12-bit sampling resolution
MMC
- 1 memory controller supporting 16-bit memory Storage data width, supports up to 128Mbyte off-chip SDR-SDRAM
Package
- BGA144 10x10 0.8mm foot pitch
