/*!
 * @file        readme.txt
 *
 * @brief       This file is routine instruction
 *
 * @version     V1.0.1
 *
 * @date        2025-05-31
 *
 * @attention
 *
 *  Copyright (C) 2023 Geehy Semiconductor
 *
 *  You may not use this file except in compliance with the
 *  GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
 *
 *  The program is only for reference, which is distributed in the hope
 *  that it will be useful and instructional for customers to develop
 *  their software. Unless required by applicable law or agreed to in
 *  writing, the program is distributed on an "AS IS" BASIS, WITHOUT
 *  ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
 *  See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
 *  and limitations under the License.
 */


&par Example Description

The program to show how to configure the TMR2 peripheral in Output
Compare Inactive mode.

  - SystemCoreClock = 16MHz.
  - TMR2CLK = SystemCoreClock = 16 MHz.divider = 16, TMR counter clock = 1 MHz
  - TMR2_Period    = 999
  - TMR2 CH1 pulse = 800
  - TMR2 CH1 delay = 800/1MHz = 800us
  - TMR2 CH2 pulse = 600
  - TMR2 CH2 delay = 600/1MHz = 600us
  - TMR2 CH3 pulse = 400
  - TMR2 CH3 delay = 400/1MHz = 400us

&par Hardware Description

using LED2(PB5).
using LED3(PB4).
using TMR2_CH1(PD4).
using TMR2_CH2(PD3).
using TMR2_CH3(PA3).


&par Software Description

While the counter is lower than the Output compare registers values,
the PC4, PC5, and PC6 are set.
When the counter value reaches the Output compare registers values,
the PC4, PC5, and PC6 are reset.
Reset system and display the PC4, PC5, and PC6 waveform by oscilloscope.

&par Directory contents

  - TMR2/TMR2_OCInactive/Source/apm32f00x_int.c    Interrupt handlers
  - TMR2/TMR2_OCInactive/Source/main.c             Main program


&par Hardware and Software environment

  - This example runs on APM32F003 MINI Devices.


&par IDE environment

MDK-ARM V5.36
EWARM V8.50.5.26295
Eclipse V2022-06（4.24.0）
